1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. 4 */ 5 6 #ifndef __DPU_RM_H__ 7 #define __DPU_RM_H__ 8 9 #include <linux/list.h> 10 11 #include "msm_kms.h" 12 #include "dpu_hw_top.h" 13 14 struct dpu_global_state; 15 16 /** 17 * struct dpu_rm - DPU dynamic hardware resource manager 18 * @pingpong_blks: array of pingpong hardware resources 19 * @mixer_blks: array of layer mixer hardware resources 20 * @ctl_blks: array of ctl hardware resources 21 * @hw_intf: array of intf hardware resources 22 * @hw_wb: array of wb hardware resources 23 * @dspp_blks: array of dspp hardware resources 24 * @hw_sspp: array of sspp hardware resources 25 */ 26 struct dpu_rm { 27 struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; 28 struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0]; 29 struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0]; 30 struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0]; 31 struct dpu_hw_wb *hw_wb[WB_MAX - WB_0]; 32 struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; 33 struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; 34 struct dpu_hw_blk *dsc_blks[DSC_MAX - DSC_0]; 35 struct dpu_hw_sspp *hw_sspp[SSPP_MAX - SSPP_NONE]; 36 }; 37 38 /** 39 * dpu_rm_init - Read hardware catalog and create reservation tracking objects 40 * for all HW blocks. 41 * @rm: DPU Resource Manager handle 42 * @cat: Pointer to hardware catalog 43 * @mdss_data: Pointer to MDSS / UBWC configuration 44 * @mmio: mapped register io address of MDP 45 * @Return: 0 on Success otherwise -ERROR 46 */ 47 int dpu_rm_init(struct dpu_rm *rm, 48 const struct dpu_mdss_cfg *cat, 49 const struct msm_mdss_data *mdss_data, 50 void __iomem *mmio); 51 52 /** 53 * dpu_rm_destroy - Free all memory allocated by dpu_rm_init 54 * @rm: DPU Resource Manager handle 55 * @Return: 0 on Success otherwise -ERROR 56 */ 57 int dpu_rm_destroy(struct dpu_rm *rm); 58 59 /** 60 * dpu_rm_reserve - Given a CRTC->Encoder->Connector display chain, analyze 61 * the use connections and user requirements, specified through related 62 * topology control properties, and reserve hardware blocks to that 63 * display chain. 64 * HW blocks can then be accessed through dpu_rm_get_* functions. 65 * HW Reservations should be released via dpu_rm_release_hw. 66 * @rm: DPU Resource Manager handle 67 * @drm_enc: DRM Encoder handle 68 * @crtc_state: Proposed Atomic DRM CRTC State handle 69 * @topology: Pointer to topology info for the display 70 * @Return: 0 on Success otherwise -ERROR 71 */ 72 int dpu_rm_reserve(struct dpu_rm *rm, 73 struct dpu_global_state *global_state, 74 struct drm_encoder *drm_enc, 75 struct drm_crtc_state *crtc_state, 76 struct msm_display_topology topology); 77 78 /** 79 * dpu_rm_reserve - Given the encoder for the display chain, release any 80 * HW blocks previously reserved for that use case. 81 * @rm: DPU Resource Manager handle 82 * @enc: DRM Encoder handle 83 * @Return: 0 on Success otherwise -ERROR 84 */ 85 void dpu_rm_release(struct dpu_global_state *global_state, 86 struct drm_encoder *enc); 87 88 /** 89 * Get hw resources of the given type that are assigned to this encoder. 90 */ 91 int dpu_rm_get_assigned_resources(struct dpu_rm *rm, 92 struct dpu_global_state *global_state, uint32_t enc_id, 93 enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size); 94 95 /** 96 * dpu_rm_get_intf - Return a struct dpu_hw_intf instance given it's index. 97 * @rm: DPU Resource Manager handle 98 * @intf_idx: INTF's index 99 */ 100 static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) 101 { 102 return rm->hw_intf[intf_idx - INTF_0]; 103 } 104 105 /** 106 * dpu_rm_get_wb - Return a struct dpu_hw_wb instance given it's index. 107 * @rm: DPU Resource Manager handle 108 * @wb_idx: WB index 109 */ 110 static inline struct dpu_hw_wb *dpu_rm_get_wb(struct dpu_rm *rm, enum dpu_wb wb_idx) 111 { 112 return rm->hw_wb[wb_idx - WB_0]; 113 } 114 115 /** 116 * dpu_rm_get_sspp - Return a struct dpu_hw_sspp instance given it's index. 117 * @rm: DPU Resource Manager handle 118 * @sspp_idx: SSPP index 119 */ 120 static inline struct dpu_hw_sspp *dpu_rm_get_sspp(struct dpu_rm *rm, enum dpu_sspp sspp_idx) 121 { 122 return rm->hw_sspp[sspp_idx - SSPP_NONE]; 123 } 124 125 #endif /* __DPU_RM_H__ */ 126 127