1 /* 2 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 * Copyright (C) 2013 Red Hat 4 * Author: Rob Clark <robdclark@gmail.com> 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 as published by 8 * the Free Software Foundation. 9 * 10 * This program is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 * You should have received a copy of the GNU General Public License along with 16 * this program. If not, see <http://www.gnu.org/licenses/>. 17 */ 18 19 #ifndef _DPU_PLANE_H_ 20 #define _DPU_PLANE_H_ 21 22 #include <drm/drm_crtc.h> 23 24 #include "dpu_kms.h" 25 #include "dpu_hw_mdss.h" 26 #include "dpu_hw_sspp.h" 27 28 /** 29 * struct dpu_plane_state: Define dpu extension of drm plane state object 30 * @base: base drm plane state object 31 * @aspace: pointer to address space for input/output buffers 32 * @stage: assigned by crtc blender 33 * @multirect_index: index of the rectangle of SSPP 34 * @multirect_mode: parallel or time multiplex multirect mode 35 * @pending: whether the current update is still pending 36 * @scaler3_cfg: configuration data for scaler3 37 * @pixel_ext: configuration data for pixel extensions 38 * @cdp_cfg: CDP configuration 39 */ 40 struct dpu_plane_state { 41 struct drm_plane_state base; 42 struct msm_gem_address_space *aspace; 43 enum dpu_stage stage; 44 uint32_t multirect_index; 45 uint32_t multirect_mode; 46 bool pending; 47 48 /* scaler configuration */ 49 struct dpu_hw_scaler3_cfg scaler3_cfg; 50 struct dpu_hw_pixel_ext pixel_ext; 51 52 struct dpu_hw_pipe_cdp_cfg cdp_cfg; 53 }; 54 55 /** 56 * struct dpu_multirect_plane_states: Defines multirect pair of drm plane states 57 * @r0: drm plane configured on rect 0 58 * @r1: drm plane configured on rect 1 59 */ 60 struct dpu_multirect_plane_states { 61 const struct drm_plane_state *r0; 62 const struct drm_plane_state *r1; 63 }; 64 65 #define to_dpu_plane_state(x) \ 66 container_of(x, struct dpu_plane_state, base) 67 68 /** 69 * dpu_plane_pipe - return sspp identifier for the given plane 70 * @plane: Pointer to DRM plane object 71 * Returns: sspp identifier of the given plane 72 */ 73 enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane); 74 75 /** 76 * is_dpu_plane_virtual - check for virtual plane 77 * @plane: Pointer to DRM plane object 78 * returns: true - if the plane is virtual 79 * false - if the plane is primary 80 */ 81 bool is_dpu_plane_virtual(struct drm_plane *plane); 82 83 /** 84 * dpu_plane_get_ctl_flush - get control flush mask 85 * @plane: Pointer to DRM plane object 86 * @ctl: Pointer to control hardware 87 * @flush_sspp: Pointer to sspp flush control word 88 */ 89 void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl, 90 u32 *flush_sspp); 91 92 /** 93 * dpu_plane_restore - restore hw state if previously power collapsed 94 * @plane: Pointer to drm plane structure 95 */ 96 void dpu_plane_restore(struct drm_plane *plane); 97 98 /** 99 * dpu_plane_flush - final plane operations before commit flush 100 * @plane: Pointer to drm plane structure 101 */ 102 void dpu_plane_flush(struct drm_plane *plane); 103 104 /** 105 * dpu_plane_set_error: enable/disable error condition 106 * @plane: pointer to drm_plane structure 107 */ 108 void dpu_plane_set_error(struct drm_plane *plane, bool error); 109 110 /** 111 * dpu_plane_init - create new dpu plane for the given pipe 112 * @dev: Pointer to DRM device 113 * @pipe: dpu hardware pipe identifier 114 * @type: Plane type - PRIMARY/OVERLAY/CURSOR 115 * @possible_crtcs: bitmask of crtc that can be attached to the given pipe 116 * @master_plane_id: primary plane id of a multirect pipe. 0 value passed for 117 * a regular plane initialization. A non-zero primary plane 118 * id will be passed for a virtual pipe initialization. 119 * 120 */ 121 struct drm_plane *dpu_plane_init(struct drm_device *dev, 122 uint32_t pipe, enum drm_plane_type type, 123 unsigned long possible_crtcs, u32 master_plane_id); 124 125 /** 126 * dpu_plane_validate_multirecti_v2 - validate the multirect planes 127 * against hw limitations 128 * @plane: drm plate states of the multirect pair 129 */ 130 int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane); 131 132 /** 133 * dpu_plane_clear_multirect - clear multirect bits for the given pipe 134 * @drm_state: Pointer to DRM plane state 135 */ 136 void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state); 137 138 /** 139 * dpu_plane_color_fill - enables color fill on plane 140 * @plane: Pointer to DRM plane object 141 * @color: RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red 142 * @alpha: 8-bit fill alpha value, 255 selects 100% alpha 143 * Returns: 0 on success 144 */ 145 int dpu_plane_color_fill(struct drm_plane *plane, 146 uint32_t color, uint32_t alpha); 147 148 #endif /* _DPU_PLANE_H_ */ 149