xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h (revision 6e0ce9ec184a1b412d2eb920dbc946c49a998652)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
4  * Copyright (C) 2013 Red Hat
5  * Author: Rob Clark <robdclark@gmail.com>
6  */
7 
8 #ifndef _DPU_PLANE_H_
9 #define _DPU_PLANE_H_
10 
11 #include <drm/drm_crtc.h>
12 
13 #include "dpu_kms.h"
14 #include "dpu_hw_mdss.h"
15 #include "dpu_hw_sspp.h"
16 
17 /**
18  * struct dpu_plane_state: Define dpu extension of drm plane state object
19  * @base:	base drm plane state object
20  * @aspace:	pointer to address space for input/output buffers
21  * @pipe:	software pipe description
22  * @pipe_cfg:	software pipe configuration
23  * @stage:	assigned by crtc blender
24  * @needs_qos_remap: qos remap settings need to be updated
25  * @multirect_index: index of the rectangle of SSPP
26  * @multirect_mode: parallel or time multiplex multirect mode
27  * @pending:	whether the current update is still pending
28  * @plane_fetch_bw: calculated BW per plane
29  * @plane_clk: calculated clk per plane
30  * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
31  * @rotation: simplified drm rotation hint
32  */
33 struct dpu_plane_state {
34 	struct drm_plane_state base;
35 	struct msm_gem_address_space *aspace;
36 	struct dpu_sw_pipe pipe;
37 	struct dpu_sw_pipe_cfg pipe_cfg;
38 	enum dpu_stage stage;
39 	bool needs_qos_remap;
40 	bool pending;
41 
42 	u64 plane_fetch_bw;
43 	u64 plane_clk;
44 
45 	bool needs_dirtyfb;
46 	unsigned int rotation;
47 };
48 
49 /**
50  * struct dpu_multirect_plane_states: Defines multirect pair of drm plane states
51  * @r0: drm plane configured on rect 0
52  * @r1: drm plane configured on rect 1
53  */
54 struct dpu_multirect_plane_states {
55 	const struct drm_plane_state *r0;
56 	const struct drm_plane_state *r1;
57 };
58 
59 #define to_dpu_plane_state(x) \
60 	container_of(x, struct dpu_plane_state, base)
61 
62 /**
63  * dpu_plane_flush - final plane operations before commit flush
64  * @plane: Pointer to drm plane structure
65  */
66 void dpu_plane_flush(struct drm_plane *plane);
67 
68 /**
69  * dpu_plane_set_error: enable/disable error condition
70  * @plane: pointer to drm_plane structure
71  */
72 void dpu_plane_set_error(struct drm_plane *plane, bool error);
73 
74 /**
75  * dpu_plane_init - create new dpu plane for the given pipe
76  * @dev:   Pointer to DRM device
77  * @pipe:  dpu hardware pipe identifier
78  * @type:  Plane type - PRIMARY/OVERLAY/CURSOR
79  * @possible_crtcs: bitmask of crtc that can be attached to the given pipe
80  *
81  */
82 struct drm_plane *dpu_plane_init(struct drm_device *dev,
83 		uint32_t pipe, enum drm_plane_type type,
84 		unsigned long possible_crtcs);
85 
86 /**
87  * dpu_plane_validate_multirecti_v2 - validate the multirect planes
88  *				      against hw limitations
89  * @plane: drm plate states of the multirect pair
90  */
91 int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane);
92 
93 /**
94  * dpu_plane_color_fill - enables color fill on plane
95  * @plane:  Pointer to DRM plane object
96  * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
97  * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
98  * Returns: 0 on success
99  */
100 int dpu_plane_color_fill(struct drm_plane *plane,
101 		uint32_t color, uint32_t alpha);
102 
103 #ifdef CONFIG_DEBUG_FS
104 void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
105 #else
106 static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
107 #endif
108 
109 #endif /* _DPU_PLANE_H_ */
110