1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved 4 */ 5 6 #ifndef _DPU_HW_WB_H 7 #define _DPU_HW_WB_H 8 9 #include "dpu_hw_catalog.h" 10 #include "dpu_hw_mdss.h" 11 #include "dpu_hw_top.h" 12 #include "dpu_hw_util.h" 13 #include "dpu_hw_pingpong.h" 14 15 struct dpu_hw_wb; 16 17 struct dpu_hw_wb_cfg { 18 struct dpu_hw_fmt_layout dest; 19 enum dpu_intf_mode intf_mode; 20 struct drm_rect roi; 21 struct drm_rect crop; 22 }; 23 24 /** 25 * 26 * struct dpu_hw_wb_ops : Interface to the wb hw driver functions 27 * Assumption is these functions will be called after clocks are enabled 28 * @setup_outaddress: setup output address from the writeback job 29 * @setup_outformat: setup output format of writeback block from writeback job 30 * @setup_qos_lut: setup qos LUT for writeback block based on input 31 * @setup_cdp: setup chroma down prefetch block for writeback block 32 * @setup_clk_force_ctrl: setup clock force control 33 * @bind_pingpong_blk: enable/disable the connection with ping-pong block 34 */ 35 struct dpu_hw_wb_ops { 36 void (*setup_outaddress)(struct dpu_hw_wb *ctx, 37 struct dpu_hw_wb_cfg *wb); 38 39 void (*setup_outformat)(struct dpu_hw_wb *ctx, 40 struct dpu_hw_wb_cfg *wb, 41 const struct msm_format *fmt); 42 43 void (*setup_roi)(struct dpu_hw_wb *ctx, 44 struct dpu_hw_wb_cfg *wb); 45 46 void (*setup_qos_lut)(struct dpu_hw_wb *ctx, 47 struct dpu_hw_qos_cfg *cfg); 48 49 void (*setup_cdp)(struct dpu_hw_wb *ctx, 50 const struct msm_format *fmt, 51 bool enable); 52 53 bool (*setup_clk_force_ctrl)(struct dpu_hw_wb *ctx, 54 bool enable); 55 56 void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx, 57 const enum dpu_pingpong pp); 58 }; 59 60 /** 61 * struct dpu_hw_wb : WB driver object 62 * @hw: block hardware details 63 * @idx: hardware index number within type 64 * @wb_hw_caps: hardware capabilities 65 * @ops: function pointers 66 */ 67 struct dpu_hw_wb { 68 struct dpu_hw_blk_reg_map hw; 69 70 /* wb path */ 71 int idx; 72 const struct dpu_wb_cfg *caps; 73 74 /* ops */ 75 struct dpu_hw_wb_ops ops; 76 }; 77 78 struct dpu_hw_wb *dpu_hw_wb_init(struct drm_device *dev, 79 const struct dpu_wb_cfg *cfg, 80 void __iomem *addr, 81 const struct dpu_mdss_version *mdss_rev); 82 83 #endif /*_DPU_HW_WB_H */ 84