1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_HW_TOP_H 6 #define _DPU_HW_TOP_H 7 8 #include "dpu_hw_catalog.h" 9 #include "dpu_hw_mdss.h" 10 #include "dpu_hw_util.h" 11 12 struct dpu_hw_mdp; 13 14 /** 15 * struct traffic_shaper_cfg: traffic shaper configuration 16 * @en : enable/disable traffic shaper 17 * @rd_client : true if read client; false if write client 18 * @client_id : client identifier 19 * @bpc_denom : denominator of byte per clk 20 * @bpc_numer : numerator of byte per clk 21 */ 22 struct traffic_shaper_cfg { 23 bool en; 24 bool rd_client; 25 u32 client_id; 26 u32 bpc_denom; 27 u64 bpc_numer; 28 }; 29 30 /** 31 * struct split_pipe_cfg - pipe configuration for dual display panels 32 * @en : Enable/disable dual pipe configuration 33 * @mode : Panel interface mode 34 * @intf : Interface id for main control path 35 * @split_flush_en: Allows both the paths to be flushed when master path is 36 * flushed 37 */ 38 struct split_pipe_cfg { 39 bool en; 40 enum dpu_intf_mode mode; 41 enum dpu_intf intf; 42 bool split_flush_en; 43 }; 44 45 /** 46 * struct dpu_danger_safe_status: danger and safe status signals 47 * @mdp: top level status 48 * @sspp: source pipe status 49 */ 50 struct dpu_danger_safe_status { 51 u8 mdp; 52 u8 sspp[SSPP_MAX]; 53 }; 54 55 /** 56 * struct dpu_vsync_source_cfg - configure vsync source and configure the 57 * watchdog timers if required. 58 * @pp_count: number of ping pongs active 59 * @frame_rate: Display frame rate 60 * @ppnumber: ping pong index array 61 * @vsync_source: vsync source selection 62 */ 63 struct dpu_vsync_source_cfg { 64 u32 pp_count; 65 u32 frame_rate; 66 u32 ppnumber[PINGPONG_MAX]; 67 u32 vsync_source; 68 }; 69 70 /** 71 * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions 72 * Assumption is these functions will be called after clocks are enabled. 73 * @setup_split_pipe : Programs the pipe control registers 74 * @setup_pp_split : Programs the pp split control registers 75 * @setup_traffic_shaper : programs traffic shaper control 76 */ 77 struct dpu_hw_mdp_ops { 78 /** setup_split_pipe() : Registers are not double buffered, thisk 79 * function should be called before timing control enable 80 * @mdp : mdp top context driver 81 * @cfg : upper and lower part of pipe configuration 82 */ 83 void (*setup_split_pipe)(struct dpu_hw_mdp *mdp, 84 struct split_pipe_cfg *p); 85 86 /** 87 * setup_traffic_shaper() : Setup traffic shaper control 88 * @mdp : mdp top context driver 89 * @cfg : traffic shaper configuration 90 */ 91 void (*setup_traffic_shaper)(struct dpu_hw_mdp *mdp, 92 struct traffic_shaper_cfg *cfg); 93 94 /** 95 * setup_clk_force_ctrl - set clock force control 96 * @mdp: mdp top context driver 97 * @clk_ctrl: clock to be controlled 98 * @enable: force on enable 99 * @return: if the clock is forced-on by this function 100 */ 101 bool (*setup_clk_force_ctrl)(struct dpu_hw_mdp *mdp, 102 enum dpu_clk_ctrl_type clk_ctrl, bool enable); 103 104 /** 105 * get_danger_status - get danger status 106 * @mdp: mdp top context driver 107 * @status: Pointer to danger safe status 108 */ 109 void (*get_danger_status)(struct dpu_hw_mdp *mdp, 110 struct dpu_danger_safe_status *status); 111 112 /** 113 * setup_vsync_source - setup vsync source configuration details 114 * @mdp: mdp top context driver 115 * @cfg: vsync source selection configuration 116 */ 117 void (*setup_vsync_source)(struct dpu_hw_mdp *mdp, 118 struct dpu_vsync_source_cfg *cfg); 119 120 /** 121 * get_safe_status - get safe status 122 * @mdp: mdp top context driver 123 * @status: Pointer to danger safe status 124 */ 125 void (*get_safe_status)(struct dpu_hw_mdp *mdp, 126 struct dpu_danger_safe_status *status); 127 128 /** 129 * intf_audio_select - select the external interface for audio 130 * @mdp: mdp top context driver 131 */ 132 void (*intf_audio_select)(struct dpu_hw_mdp *mdp); 133 }; 134 135 struct dpu_hw_mdp { 136 struct dpu_hw_blk base; 137 struct dpu_hw_blk_reg_map hw; 138 139 /* top */ 140 const struct dpu_mdp_cfg *caps; 141 142 /* ops */ 143 struct dpu_hw_mdp_ops ops; 144 }; 145 146 /** 147 * dpu_hw_mdptop_init - initializes the top driver for the passed config 148 * @dev: Corresponding device for devres management 149 * @cfg: MDP TOP configuration from catalog 150 * @addr: Mapped register io address of MDP 151 * @m: Pointer to mdss catalog data 152 */ 153 struct dpu_hw_mdp *dpu_hw_mdptop_init(struct drm_device *dev, 154 const struct dpu_mdp_cfg *cfg, 155 void __iomem *addr, 156 const struct dpu_mdss_cfg *m); 157 158 void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp); 159 160 #endif /*_DPU_HW_TOP_H */ 161