1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 3 */ 4 5 #ifndef _DPU_HW_SSPP_H 6 #define _DPU_HW_SSPP_H 7 8 #include "dpu_hw_catalog.h" 9 #include "dpu_hw_mdss.h" 10 #include "dpu_hw_util.h" 11 #include "dpu_hw_blk.h" 12 #include "dpu_formats.h" 13 14 struct dpu_hw_pipe; 15 16 /** 17 * Flags 18 */ 19 #define DPU_SSPP_FLIP_LR BIT(0) 20 #define DPU_SSPP_FLIP_UD BIT(1) 21 #define DPU_SSPP_SOURCE_ROTATED_90 BIT(2) 22 #define DPU_SSPP_ROT_90 BIT(3) 23 #define DPU_SSPP_SOLID_FILL BIT(4) 24 25 /** 26 * Define all scaler feature bits in catalog 27 */ 28 #define DPU_SSPP_SCALER ((1UL << DPU_SSPP_SCALER_RGB) | \ 29 (1UL << DPU_SSPP_SCALER_QSEED2) | \ 30 (1UL << DPU_SSPP_SCALER_QSEED3) | \ 31 (1UL << DPU_SSPP_SCALER_QSEED4)) 32 33 /** 34 * Component indices 35 */ 36 enum { 37 DPU_SSPP_COMP_0, 38 DPU_SSPP_COMP_1_2, 39 DPU_SSPP_COMP_2, 40 DPU_SSPP_COMP_3, 41 42 DPU_SSPP_COMP_MAX 43 }; 44 45 /** 46 * DPU_SSPP_RECT_SOLO - multirect disabled 47 * DPU_SSPP_RECT_0 - rect0 of a multirect pipe 48 * DPU_SSPP_RECT_1 - rect1 of a multirect pipe 49 * 50 * Note: HW supports multirect with either RECT0 or 51 * RECT1. Considering no benefit of such configs over 52 * SOLO mode and to keep the plane management simple, 53 * we dont support single rect multirect configs. 54 */ 55 enum dpu_sspp_multirect_index { 56 DPU_SSPP_RECT_SOLO = 0, 57 DPU_SSPP_RECT_0, 58 DPU_SSPP_RECT_1, 59 }; 60 61 enum dpu_sspp_multirect_mode { 62 DPU_SSPP_MULTIRECT_NONE = 0, 63 DPU_SSPP_MULTIRECT_PARALLEL, 64 DPU_SSPP_MULTIRECT_TIME_MX, 65 }; 66 67 enum { 68 DPU_FRAME_LINEAR, 69 DPU_FRAME_TILE_A4X, 70 DPU_FRAME_TILE_A5X, 71 }; 72 73 enum dpu_hw_filter { 74 DPU_SCALE_FILTER_NEAREST = 0, 75 DPU_SCALE_FILTER_BIL, 76 DPU_SCALE_FILTER_PCMN, 77 DPU_SCALE_FILTER_CA, 78 DPU_SCALE_FILTER_MAX 79 }; 80 81 enum dpu_hw_filter_alpa { 82 DPU_SCALE_ALPHA_PIXEL_REP, 83 DPU_SCALE_ALPHA_BIL 84 }; 85 86 enum dpu_hw_filter_yuv { 87 DPU_SCALE_2D_4X4, 88 DPU_SCALE_2D_CIR, 89 DPU_SCALE_1D_SEP, 90 DPU_SCALE_BIL 91 }; 92 93 struct dpu_hw_sharp_cfg { 94 u32 strength; 95 u32 edge_thr; 96 u32 smooth_thr; 97 u32 noise_thr; 98 }; 99 100 struct dpu_hw_pixel_ext { 101 /* scaling factors are enabled for this input layer */ 102 uint8_t enable_pxl_ext; 103 104 int init_phase_x[DPU_MAX_PLANES]; 105 int phase_step_x[DPU_MAX_PLANES]; 106 int init_phase_y[DPU_MAX_PLANES]; 107 int phase_step_y[DPU_MAX_PLANES]; 108 109 /* 110 * Number of pixels extension in left, right, top and bottom direction 111 * for all color components. This pixel value for each color component 112 * should be sum of fetch + repeat pixels. 113 */ 114 int num_ext_pxls_left[DPU_MAX_PLANES]; 115 int num_ext_pxls_right[DPU_MAX_PLANES]; 116 int num_ext_pxls_top[DPU_MAX_PLANES]; 117 int num_ext_pxls_btm[DPU_MAX_PLANES]; 118 119 /* 120 * Number of pixels needs to be overfetched in left, right, top and 121 * bottom directions from source image for scaling. 122 */ 123 int left_ftch[DPU_MAX_PLANES]; 124 int right_ftch[DPU_MAX_PLANES]; 125 int top_ftch[DPU_MAX_PLANES]; 126 int btm_ftch[DPU_MAX_PLANES]; 127 128 /* 129 * Number of pixels needs to be repeated in left, right, top and 130 * bottom directions for scaling. 131 */ 132 int left_rpt[DPU_MAX_PLANES]; 133 int right_rpt[DPU_MAX_PLANES]; 134 int top_rpt[DPU_MAX_PLANES]; 135 int btm_rpt[DPU_MAX_PLANES]; 136 137 uint32_t roi_w[DPU_MAX_PLANES]; 138 uint32_t roi_h[DPU_MAX_PLANES]; 139 140 /* 141 * Filter type to be used for scaling in horizontal and vertical 142 * directions 143 */ 144 enum dpu_hw_filter horz_filter[DPU_MAX_PLANES]; 145 enum dpu_hw_filter vert_filter[DPU_MAX_PLANES]; 146 147 }; 148 149 /** 150 * struct dpu_hw_pipe_cfg : Pipe description 151 * @layout: format layout information for programming buffer to hardware 152 * @src_rect: src ROI, caller takes into account the different operations 153 * such as decimation, flip etc to program this field 154 * @dest_rect: destination ROI. 155 * @index: index of the rectangle of SSPP 156 * @mode: parallel or time multiplex multirect mode 157 */ 158 struct dpu_hw_pipe_cfg { 159 struct dpu_hw_fmt_layout layout; 160 struct drm_rect src_rect; 161 struct drm_rect dst_rect; 162 enum dpu_sspp_multirect_index index; 163 enum dpu_sspp_multirect_mode mode; 164 }; 165 166 /** 167 * struct dpu_hw_pipe_qos_cfg : Source pipe QoS configuration 168 * @danger_lut: LUT for generate danger level based on fill level 169 * @safe_lut: LUT for generate safe level based on fill level 170 * @creq_lut: LUT for generate creq level based on fill level 171 * @creq_vblank: creq value generated to vbif during vertical blanking 172 * @danger_vblank: danger value generated during vertical blanking 173 * @vblank_en: enable creq_vblank and danger_vblank during vblank 174 * @danger_safe_en: enable danger safe generation 175 */ 176 struct dpu_hw_pipe_qos_cfg { 177 u32 danger_lut; 178 u32 safe_lut; 179 u64 creq_lut; 180 u32 creq_vblank; 181 u32 danger_vblank; 182 bool vblank_en; 183 bool danger_safe_en; 184 }; 185 186 /** 187 * enum CDP preload ahead address size 188 */ 189 enum { 190 DPU_SSPP_CDP_PRELOAD_AHEAD_32, 191 DPU_SSPP_CDP_PRELOAD_AHEAD_64 192 }; 193 194 /** 195 * struct dpu_hw_pipe_cdp_cfg : CDP configuration 196 * @enable: true to enable CDP 197 * @ubwc_meta_enable: true to enable ubwc metadata preload 198 * @tile_amortize_enable: true to enable amortization control for tile format 199 * @preload_ahead: number of request to preload ahead 200 * DPU_SSPP_CDP_PRELOAD_AHEAD_32, 201 * DPU_SSPP_CDP_PRELOAD_AHEAD_64 202 */ 203 struct dpu_hw_pipe_cdp_cfg { 204 bool enable; 205 bool ubwc_meta_enable; 206 bool tile_amortize_enable; 207 u32 preload_ahead; 208 }; 209 210 /** 211 * struct dpu_hw_pipe_ts_cfg - traffic shaper configuration 212 * @size: size to prefill in bytes, or zero to disable 213 * @time: time to prefill in usec, or zero to disable 214 */ 215 struct dpu_hw_pipe_ts_cfg { 216 u64 size; 217 u64 time; 218 }; 219 220 /** 221 * struct dpu_hw_sspp_ops - interface to the SSPP Hw driver functions 222 * Caller must call the init function to get the pipe context for each pipe 223 * Assumption is these functions will be called after clocks are enabled 224 */ 225 struct dpu_hw_sspp_ops { 226 /** 227 * setup_format - setup pixel format cropping rectangle, flip 228 * @ctx: Pointer to pipe context 229 * @cfg: Pointer to pipe config structure 230 * @flags: Extra flags for format config 231 * @index: rectangle index in multirect 232 */ 233 void (*setup_format)(struct dpu_hw_pipe *ctx, 234 const struct dpu_format *fmt, u32 flags, 235 enum dpu_sspp_multirect_index index); 236 237 /** 238 * setup_rects - setup pipe ROI rectangles 239 * @ctx: Pointer to pipe context 240 * @cfg: Pointer to pipe config structure 241 * @index: rectangle index in multirect 242 */ 243 void (*setup_rects)(struct dpu_hw_pipe *ctx, 244 struct dpu_hw_pipe_cfg *cfg, 245 enum dpu_sspp_multirect_index index); 246 247 /** 248 * setup_pe - setup pipe pixel extension 249 * @ctx: Pointer to pipe context 250 * @pe_ext: Pointer to pixel ext settings 251 */ 252 void (*setup_pe)(struct dpu_hw_pipe *ctx, 253 struct dpu_hw_pixel_ext *pe_ext); 254 255 /** 256 * setup_sourceaddress - setup pipe source addresses 257 * @ctx: Pointer to pipe context 258 * @cfg: Pointer to pipe config structure 259 * @index: rectangle index in multirect 260 */ 261 void (*setup_sourceaddress)(struct dpu_hw_pipe *ctx, 262 struct dpu_hw_pipe_cfg *cfg, 263 enum dpu_sspp_multirect_index index); 264 265 /** 266 * setup_csc - setup color space coversion 267 * @ctx: Pointer to pipe context 268 * @data: Pointer to config structure 269 */ 270 void (*setup_csc)(struct dpu_hw_pipe *ctx, struct dpu_csc_cfg *data); 271 272 /** 273 * setup_solidfill - enable/disable colorfill 274 * @ctx: Pointer to pipe context 275 * @const_color: Fill color value 276 * @flags: Pipe flags 277 * @index: rectangle index in multirect 278 */ 279 void (*setup_solidfill)(struct dpu_hw_pipe *ctx, u32 color, 280 enum dpu_sspp_multirect_index index); 281 282 /** 283 * setup_multirect - setup multirect configuration 284 * @ctx: Pointer to pipe context 285 * @index: rectangle index in multirect 286 * @mode: parallel fetch / time multiplex multirect mode 287 */ 288 289 void (*setup_multirect)(struct dpu_hw_pipe *ctx, 290 enum dpu_sspp_multirect_index index, 291 enum dpu_sspp_multirect_mode mode); 292 293 /** 294 * setup_sharpening - setup sharpening 295 * @ctx: Pointer to pipe context 296 * @cfg: Pointer to config structure 297 */ 298 void (*setup_sharpening)(struct dpu_hw_pipe *ctx, 299 struct dpu_hw_sharp_cfg *cfg); 300 301 /** 302 * setup_danger_safe_lut - setup danger safe LUTs 303 * @ctx: Pointer to pipe context 304 * @cfg: Pointer to pipe QoS configuration 305 * 306 */ 307 void (*setup_danger_safe_lut)(struct dpu_hw_pipe *ctx, 308 struct dpu_hw_pipe_qos_cfg *cfg); 309 310 /** 311 * setup_creq_lut - setup CREQ LUT 312 * @ctx: Pointer to pipe context 313 * @cfg: Pointer to pipe QoS configuration 314 * 315 */ 316 void (*setup_creq_lut)(struct dpu_hw_pipe *ctx, 317 struct dpu_hw_pipe_qos_cfg *cfg); 318 319 /** 320 * setup_qos_ctrl - setup QoS control 321 * @ctx: Pointer to pipe context 322 * @cfg: Pointer to pipe QoS configuration 323 * 324 */ 325 void (*setup_qos_ctrl)(struct dpu_hw_pipe *ctx, 326 struct dpu_hw_pipe_qos_cfg *cfg); 327 328 /** 329 * setup_histogram - setup histograms 330 * @ctx: Pointer to pipe context 331 * @cfg: Pointer to histogram configuration 332 */ 333 void (*setup_histogram)(struct dpu_hw_pipe *ctx, 334 void *cfg); 335 336 /** 337 * setup_scaler - setup scaler 338 * @ctx: Pointer to pipe context 339 * @pipe_cfg: Pointer to pipe configuration 340 * @pe_cfg: Pointer to pixel extension configuration 341 * @scaler_cfg: Pointer to scaler configuration 342 */ 343 void (*setup_scaler)(struct dpu_hw_pipe *ctx, 344 struct dpu_hw_pipe_cfg *pipe_cfg, 345 struct dpu_hw_pixel_ext *pe_cfg, 346 void *scaler_cfg); 347 348 /** 349 * get_scaler_ver - get scaler h/w version 350 * @ctx: Pointer to pipe context 351 */ 352 u32 (*get_scaler_ver)(struct dpu_hw_pipe *ctx); 353 354 /** 355 * setup_cdp - setup client driven prefetch 356 * @ctx: Pointer to pipe context 357 * @cfg: Pointer to cdp configuration 358 */ 359 void (*setup_cdp)(struct dpu_hw_pipe *ctx, 360 struct dpu_hw_pipe_cdp_cfg *cfg); 361 }; 362 363 /** 364 * struct dpu_hw_pipe - pipe description 365 * @base: hardware block base structure 366 * @hw: block hardware details 367 * @catalog: back pointer to catalog 368 * @mdp: pointer to associated mdp portion of the catalog 369 * @idx: pipe index 370 * @cap: pointer to layer_cfg 371 * @ops: pointer to operations possible for this pipe 372 */ 373 struct dpu_hw_pipe { 374 struct dpu_hw_blk base; 375 struct dpu_hw_blk_reg_map hw; 376 struct dpu_mdss_cfg *catalog; 377 const struct dpu_mdp_cfg *mdp; 378 379 /* Pipe */ 380 enum dpu_sspp idx; 381 const struct dpu_sspp_cfg *cap; 382 383 /* Ops */ 384 struct dpu_hw_sspp_ops ops; 385 }; 386 387 /** 388 * dpu_hw_sspp_init - initializes the sspp hw driver object. 389 * Should be called once before accessing every pipe. 390 * @idx: Pipe index for which driver object is required 391 * @addr: Mapped register io address of MDP 392 * @catalog : Pointer to mdss catalog data 393 * @is_virtual_pipe: is this pipe virtual pipe 394 */ 395 struct dpu_hw_pipe *dpu_hw_sspp_init(enum dpu_sspp idx, 396 void __iomem *addr, struct dpu_mdss_cfg *catalog, 397 bool is_virtual_pipe); 398 399 /** 400 * dpu_hw_sspp_destroy(): Destroys SSPP driver context 401 * should be called during Hw pipe cleanup. 402 * @ctx: Pointer to SSPP driver context returned by dpu_hw_sspp_init 403 */ 404 void dpu_hw_sspp_destroy(struct dpu_hw_pipe *ctx); 405 406 #endif /*_DPU_HW_SSPP_H */ 407 408