xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h (revision 95298d63c67673c654c08952672d016212b26054)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
3  */
4 
5 #ifndef _DPU_HW_PINGPONG_H
6 #define _DPU_HW_PINGPONG_H
7 
8 #include "dpu_hw_catalog.h"
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hw_util.h"
11 #include "dpu_hw_blk.h"
12 
13 struct dpu_hw_pingpong;
14 
15 struct dpu_hw_tear_check {
16 	/*
17 	 * This is ratio of MDP VSYNC clk freq(Hz) to
18 	 * refresh rate divided by no of lines
19 	 */
20 	u32 vsync_count;
21 	u32 sync_cfg_height;
22 	u32 vsync_init_val;
23 	u32 sync_threshold_start;
24 	u32 sync_threshold_continue;
25 	u32 start_pos;
26 	u32 rd_ptr_irq;
27 	u8 hw_vsync_mode;
28 };
29 
30 struct dpu_hw_pp_vsync_info {
31 	u32 rd_ptr_init_val;	/* value of rd pointer at vsync edge */
32 	u32 rd_ptr_frame_count;	/* num frames sent since enabling interface */
33 	u32 rd_ptr_line_count;	/* current line on panel (rd ptr) */
34 	u32 wr_ptr_line_count;	/* current line within pp fifo (wr ptr) */
35 };
36 
37 /**
38  *
39  * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions
40  *  Assumption is these functions will be called after clocks are enabled
41  *  @setup_tearcheck : program tear check values
42  *  @enable_tearcheck : enables tear check
43  *  @get_vsync_info : retries timing info of the panel
44  *  @setup_dither : function to program the dither hw block
45  *  @get_line_count: obtain current vertical line counter
46  */
47 struct dpu_hw_pingpong_ops {
48 	/**
49 	 * enables vysnc generation and sets up init value of
50 	 * read pointer and programs the tear check cofiguration
51 	 */
52 	int (*setup_tearcheck)(struct dpu_hw_pingpong *pp,
53 			struct dpu_hw_tear_check *cfg);
54 
55 	/**
56 	 * enables tear check block
57 	 */
58 	int (*enable_tearcheck)(struct dpu_hw_pingpong *pp,
59 			bool enable);
60 
61 	/**
62 	 * read, modify, write to either set or clear listening to external TE
63 	 * @Return: 1 if TE was originally connected, 0 if not, or -ERROR
64 	 */
65 	int (*connect_external_te)(struct dpu_hw_pingpong *pp,
66 			bool enable_external_te);
67 
68 	/**
69 	 * provides the programmed and current
70 	 * line_count
71 	 */
72 	int (*get_vsync_info)(struct dpu_hw_pingpong *pp,
73 			struct dpu_hw_pp_vsync_info  *info);
74 
75 	/**
76 	 * poll until write pointer transmission starts
77 	 * @Return: 0 on success, -ETIMEDOUT on timeout
78 	 */
79 	int (*poll_timeout_wr_ptr)(struct dpu_hw_pingpong *pp, u32 timeout_us);
80 
81 	/**
82 	 * Obtain current vertical line counter
83 	 */
84 	u32 (*get_line_count)(struct dpu_hw_pingpong *pp);
85 };
86 
87 struct dpu_hw_pingpong {
88 	struct dpu_hw_blk base;
89 	struct dpu_hw_blk_reg_map hw;
90 
91 	/* pingpong */
92 	enum dpu_pingpong idx;
93 	const struct dpu_pingpong_cfg *caps;
94 
95 	/* ops */
96 	struct dpu_hw_pingpong_ops ops;
97 };
98 
99 /**
100  * to_dpu_hw_pingpong - convert base object dpu_hw_base to container
101  * @hw: Pointer to base hardware block
102  * return: Pointer to hardware block container
103  */
104 static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
105 {
106 	return container_of(hw, struct dpu_hw_pingpong, base);
107 }
108 
109 /**
110  * dpu_hw_pingpong_init - initializes the pingpong driver for the passed
111  *	pingpong idx.
112  * @idx:  Pingpong index for which driver object is required
113  * @addr: Mapped register io address of MDP
114  * @m:    Pointer to mdss catalog data
115  * Returns: Error code or allocated dpu_hw_pingpong context
116  */
117 struct dpu_hw_pingpong *dpu_hw_pingpong_init(enum dpu_pingpong idx,
118 		void __iomem *addr,
119 		const struct dpu_mdss_cfg *m);
120 
121 /**
122  * dpu_hw_pingpong_destroy - destroys pingpong driver context
123  *	should be called to free the context
124  * @pp:   Pointer to PP driver context returned by dpu_hw_pingpong_init
125  */
126 void dpu_hw_pingpong_destroy(struct dpu_hw_pingpong *pp);
127 
128 #endif /*_DPU_HW_PINGPONG_H */
129