xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_pingpong.h (revision 4db102dcb0396a4ccf89b1eac0f4eb3fd167a080)
197fb5e8dSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-only */
225fdd593SJeykumar Sankaran /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
325fdd593SJeykumar Sankaran  */
425fdd593SJeykumar Sankaran 
525fdd593SJeykumar Sankaran #ifndef _DPU_HW_PINGPONG_H
625fdd593SJeykumar Sankaran #define _DPU_HW_PINGPONG_H
725fdd593SJeykumar Sankaran 
825fdd593SJeykumar Sankaran #include "dpu_hw_catalog.h"
925fdd593SJeykumar Sankaran #include "dpu_hw_mdss.h"
1025fdd593SJeykumar Sankaran #include "dpu_hw_util.h"
1125fdd593SJeykumar Sankaran 
123c128638SKalyan Thota #define DITHER_MATRIX_SZ 16
133c128638SKalyan Thota 
1425fdd593SJeykumar Sankaran struct dpu_hw_pingpong;
1525fdd593SJeykumar Sankaran 
1625fdd593SJeykumar Sankaran /**
173c128638SKalyan Thota  * struct dpu_hw_dither_cfg - dither feature structure
183c128638SKalyan Thota  * @flags: for customizing operations
193c128638SKalyan Thota  * @temporal_en: temperal dither enable
203c128638SKalyan Thota  * @c0_bitdepth: c0 component bit depth
213c128638SKalyan Thota  * @c1_bitdepth: c1 component bit depth
223c128638SKalyan Thota  * @c2_bitdepth: c2 component bit depth
233c128638SKalyan Thota  * @c3_bitdepth: c2 component bit depth
243c128638SKalyan Thota  * @matrix: dither strength matrix
253c128638SKalyan Thota  */
263c128638SKalyan Thota struct dpu_hw_dither_cfg {
273c128638SKalyan Thota 	u64 flags;
283c128638SKalyan Thota 	u32 temporal_en;
293c128638SKalyan Thota 	u32 c0_bitdepth;
303c128638SKalyan Thota 	u32 c1_bitdepth;
313c128638SKalyan Thota 	u32 c2_bitdepth;
323c128638SKalyan Thota 	u32 c3_bitdepth;
333c128638SKalyan Thota 	u32 matrix[DITHER_MATRIX_SZ];
343c128638SKalyan Thota };
353c128638SKalyan Thota 
363c128638SKalyan Thota /**
3725fdd593SJeykumar Sankaran  *
3825fdd593SJeykumar Sankaran  * struct dpu_hw_pingpong_ops : Interface to the pingpong Hw driver functions
3925fdd593SJeykumar Sankaran  *  Assumption is these functions will be called after clocks are enabled
40bb9f1880SMarijn Suijten  *  @enable_tearcheck: program and enable tear check block
41bb9f1880SMarijn Suijten  *  @disable_tearcheck: disable able tear check block
4225fdd593SJeykumar Sankaran  *  @setup_dither : function to program the dither hw block
4325fdd593SJeykumar Sankaran  *  @get_line_count: obtain current vertical line counter
4425fdd593SJeykumar Sankaran  */
4525fdd593SJeykumar Sankaran struct dpu_hw_pingpong_ops {
4625fdd593SJeykumar Sankaran 	/**
4725fdd593SJeykumar Sankaran 	 * enables vysnc generation and sets up init value of
4825fdd593SJeykumar Sankaran 	 * read pointer and programs the tear check cofiguration
4925fdd593SJeykumar Sankaran 	 */
50bb9f1880SMarijn Suijten 	int (*enable_tearcheck)(struct dpu_hw_pingpong *pp,
5125fdd593SJeykumar Sankaran 			struct dpu_hw_tear_check *cfg);
5225fdd593SJeykumar Sankaran 
5325fdd593SJeykumar Sankaran 	/**
54bb9f1880SMarijn Suijten 	 * disables tear check block
5525fdd593SJeykumar Sankaran 	 */
56bb9f1880SMarijn Suijten 	int (*disable_tearcheck)(struct dpu_hw_pingpong *pp);
5725fdd593SJeykumar Sankaran 
5825fdd593SJeykumar Sankaran 	/**
5925fdd593SJeykumar Sankaran 	 * read, modify, write to either set or clear listening to external TE
6025fdd593SJeykumar Sankaran 	 * @Return: 1 if TE was originally connected, 0 if not, or -ERROR
6125fdd593SJeykumar Sankaran 	 */
6225fdd593SJeykumar Sankaran 	int (*connect_external_te)(struct dpu_hw_pingpong *pp,
6325fdd593SJeykumar Sankaran 			bool enable_external_te);
6425fdd593SJeykumar Sankaran 
6525fdd593SJeykumar Sankaran 	/**
6625fdd593SJeykumar Sankaran 	 * Obtain current vertical line counter
6725fdd593SJeykumar Sankaran 	 */
6825fdd593SJeykumar Sankaran 	u32 (*get_line_count)(struct dpu_hw_pingpong *pp);
693c128638SKalyan Thota 
703c128638SKalyan Thota 	/**
714a7c38ecSMarijn Suijten 	 * Disable autorefresh if enabled
724a7c38ecSMarijn Suijten 	 */
734a7c38ecSMarijn Suijten 	void (*disable_autorefresh)(struct dpu_hw_pingpong *pp, uint32_t encoder_id, u16 vdisplay);
744a7c38ecSMarijn Suijten 
754a7c38ecSMarijn Suijten 	/**
763c128638SKalyan Thota 	 * Setup dither matix for pingpong block
773c128638SKalyan Thota 	 */
783c128638SKalyan Thota 	void (*setup_dither)(struct dpu_hw_pingpong *pp,
793c128638SKalyan Thota 			struct dpu_hw_dither_cfg *cfg);
80893d6982SVinod Koul 	/**
81893d6982SVinod Koul 	 * Enable DSC
82893d6982SVinod Koul 	 */
83893d6982SVinod Koul 	int (*enable_dsc)(struct dpu_hw_pingpong *pp);
84893d6982SVinod Koul 
85893d6982SVinod Koul 	/**
86893d6982SVinod Koul 	 * Disable DSC
87893d6982SVinod Koul 	 */
88893d6982SVinod Koul 	void (*disable_dsc)(struct dpu_hw_pingpong *pp);
89893d6982SVinod Koul 
90893d6982SVinod Koul 	/**
91893d6982SVinod Koul 	 * Setup DSC
92893d6982SVinod Koul 	 */
93893d6982SVinod Koul 	int (*setup_dsc)(struct dpu_hw_pingpong *pp);
9425fdd593SJeykumar Sankaran };
9525fdd593SJeykumar Sankaran 
96dfa35bacSDmitry Baryshkov struct dpu_hw_merge_3d;
97dfa35bacSDmitry Baryshkov 
9825fdd593SJeykumar Sankaran struct dpu_hw_pingpong {
9925fdd593SJeykumar Sankaran 	struct dpu_hw_blk base;
10025fdd593SJeykumar Sankaran 	struct dpu_hw_blk_reg_map hw;
10125fdd593SJeykumar Sankaran 
10225fdd593SJeykumar Sankaran 	/* pingpong */
10325fdd593SJeykumar Sankaran 	enum dpu_pingpong idx;
10425fdd593SJeykumar Sankaran 	const struct dpu_pingpong_cfg *caps;
105dfa35bacSDmitry Baryshkov 	struct dpu_hw_merge_3d *merge_3d;
10625fdd593SJeykumar Sankaran 
10725fdd593SJeykumar Sankaran 	/* ops */
10825fdd593SJeykumar Sankaran 	struct dpu_hw_pingpong_ops ops;
10925fdd593SJeykumar Sankaran };
11025fdd593SJeykumar Sankaran 
11125fdd593SJeykumar Sankaran /**
112b954fa6bSDrew Davenport  * to_dpu_hw_pingpong - convert base object dpu_hw_base to container
113b954fa6bSDrew Davenport  * @hw: Pointer to base hardware block
114b954fa6bSDrew Davenport  * return: Pointer to hardware block container
115b954fa6bSDrew Davenport  */
to_dpu_hw_pingpong(struct dpu_hw_blk * hw)116b954fa6bSDrew Davenport static inline struct dpu_hw_pingpong *to_dpu_hw_pingpong(struct dpu_hw_blk *hw)
117b954fa6bSDrew Davenport {
118b954fa6bSDrew Davenport 	return container_of(hw, struct dpu_hw_pingpong, base);
119b954fa6bSDrew Davenport }
120b954fa6bSDrew Davenport 
121b954fa6bSDrew Davenport /**
122babdb815SMarijn Suijten  * dpu_hw_pingpong_init() - initializes the pingpong driver for the passed
123babdb815SMarijn Suijten  * pingpong catalog entry.
124*a106ed98SDmitry Baryshkov  * @dev:  Corresponding device for devres management
125babdb815SMarijn Suijten  * @cfg:  Pingpong catalog entry for which driver object is required
12625fdd593SJeykumar Sankaran  * @addr: Mapped register io address of MDP
12748d67e42SDmitry Baryshkov  * @mdss_rev: dpu core's major and minor versions
128babdb815SMarijn Suijten  * Return: Error code or allocated dpu_hw_pingpong context
12925fdd593SJeykumar Sankaran  */
130*a106ed98SDmitry Baryshkov struct dpu_hw_pingpong *dpu_hw_pingpong_init(struct drm_device *dev,
131*a106ed98SDmitry Baryshkov 					     const struct dpu_pingpong_cfg *cfg,
132*a106ed98SDmitry Baryshkov 					     void __iomem *addr,
133*a106ed98SDmitry Baryshkov 					     const struct dpu_mdss_version *mdss_rev);
13425fdd593SJeykumar Sankaran 
13525fdd593SJeykumar Sankaran #endif /*_DPU_HW_PINGPONG_H */
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