xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_merge3d.c (revision 2b0cfa6e49566c8fa6759734cf821aa6e8271a9e)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
3  */
4 
5 #include <linux/iopoll.h>
6 
7 #include <drm/drm_managed.h>
8 
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hwio.h"
11 #include "dpu_hw_catalog.h"
12 #include "dpu_hw_merge3d.h"
13 #include "dpu_kms.h"
14 #include "dpu_trace.h"
15 
16 #define MERGE_3D_MUX  0x000
17 #define MERGE_3D_MODE 0x004
18 
19 static void dpu_hw_merge_3d_setup_3d_mode(struct dpu_hw_merge_3d *merge_3d,
20 			enum dpu_3d_blend_mode mode_3d)
21 {
22 	struct dpu_hw_blk_reg_map *c;
23 	u32 data;
24 
25 
26 	c = &merge_3d->hw;
27 	if (mode_3d == BLEND_3D_NONE) {
28 		DPU_REG_WRITE(c, MERGE_3D_MODE, 0);
29 		DPU_REG_WRITE(c, MERGE_3D_MUX, 0);
30 	} else {
31 		data = BIT(0) | ((mode_3d - 1) << 1);
32 		DPU_REG_WRITE(c, MERGE_3D_MODE, data);
33 	}
34 }
35 
36 static void _setup_merge_3d_ops(struct dpu_hw_merge_3d *c,
37 				unsigned long features)
38 {
39 	c->ops.setup_3d_mode = dpu_hw_merge_3d_setup_3d_mode;
40 };
41 
42 struct dpu_hw_merge_3d *dpu_hw_merge_3d_init(struct drm_device *dev,
43 					     const struct dpu_merge_3d_cfg *cfg,
44 					     void __iomem *addr)
45 {
46 	struct dpu_hw_merge_3d *c;
47 
48 	c = drmm_kzalloc(dev, sizeof(*c), GFP_KERNEL);
49 	if (!c)
50 		return ERR_PTR(-ENOMEM);
51 
52 	c->hw.blk_addr = addr + cfg->base;
53 	c->hw.log_mask = DPU_DBG_MASK_PINGPONG;
54 
55 	c->idx = cfg->id;
56 	c->caps = cfg;
57 	_setup_merge_3d_ops(c, c->caps->features);
58 
59 	return c;
60 }
61