1 /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 */ 12 13 #ifndef _DPU_HW_LM_H 14 #define _DPU_HW_LM_H 15 16 #include "dpu_hw_mdss.h" 17 #include "dpu_hw_util.h" 18 #include "dpu_hw_blk.h" 19 20 struct dpu_hw_mixer; 21 22 struct dpu_hw_mixer_cfg { 23 u32 out_width; 24 u32 out_height; 25 bool right_mixer; 26 int flags; 27 }; 28 29 struct dpu_hw_color3_cfg { 30 u8 keep_fg[DPU_STAGE_MAX]; 31 }; 32 33 /** 34 * 35 * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions 36 * Assumption is these functions will be called after clocks are enabled 37 */ 38 struct dpu_hw_lm_ops { 39 /* 40 * Sets up mixer output width and height 41 * and border color if enabled 42 */ 43 void (*setup_mixer_out)(struct dpu_hw_mixer *ctx, 44 struct dpu_hw_mixer_cfg *cfg); 45 46 /* 47 * Alpha blending configuration 48 * for the specified stage 49 */ 50 void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage, 51 uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op); 52 53 /* 54 * Alpha color component selection from either fg or bg 55 */ 56 void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op); 57 58 /** 59 * setup_border_color : enable/disable border color 60 */ 61 void (*setup_border_color)(struct dpu_hw_mixer *ctx, 62 struct dpu_mdss_color *color, 63 u8 border_en); 64 /** 65 * setup_gc : enable/disable gamma correction feature 66 */ 67 void (*setup_gc)(struct dpu_hw_mixer *mixer, 68 void *cfg); 69 70 /* setup_misr: enables/disables MISR in HW register */ 71 void (*setup_misr)(struct dpu_hw_mixer *ctx, 72 bool enable, u32 frame_count); 73 74 /* collect_misr: reads and stores MISR data from HW register */ 75 u32 (*collect_misr)(struct dpu_hw_mixer *ctx); 76 }; 77 78 struct dpu_hw_mixer { 79 struct dpu_hw_blk base; 80 struct dpu_hw_blk_reg_map hw; 81 82 /* lm */ 83 enum dpu_lm idx; 84 const struct dpu_lm_cfg *cap; 85 const struct dpu_mdp_cfg *mdp; 86 const struct dpu_ctl_cfg *ctl; 87 88 /* ops */ 89 struct dpu_hw_lm_ops ops; 90 91 /* store mixer info specific to display */ 92 struct dpu_hw_mixer_cfg cfg; 93 }; 94 95 /** 96 * to_dpu_hw_mixer - convert base object dpu_hw_base to container 97 * @hw: Pointer to base hardware block 98 * return: Pointer to hardware block container 99 */ 100 static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw) 101 { 102 return container_of(hw, struct dpu_hw_mixer, base); 103 } 104 105 /** 106 * dpu_hw_lm_init(): Initializes the mixer hw driver object. 107 * should be called once before accessing every mixer. 108 * @idx: mixer index for which driver object is required 109 * @addr: mapped register io address of MDP 110 * @m : pointer to mdss catalog data 111 */ 112 struct dpu_hw_mixer *dpu_hw_lm_init(enum dpu_lm idx, 113 void __iomem *addr, 114 struct dpu_mdss_cfg *m); 115 116 /** 117 * dpu_hw_lm_destroy(): Destroys layer mixer driver context 118 * @lm: Pointer to LM driver context 119 */ 120 void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm); 121 122 #endif /*_DPU_HW_LM_H */ 123