xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h (revision 0e2b2a76278153d1ac312b0691cb65dabb9aef3e)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
4  */
5 
6 #ifndef _DPU_HW_LM_H
7 #define _DPU_HW_LM_H
8 
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hw_util.h"
11 
12 struct dpu_hw_mixer;
13 
14 struct dpu_hw_mixer_cfg {
15 	u32 out_width;
16 	u32 out_height;
17 	bool right_mixer;
18 	int flags;
19 };
20 
21 struct dpu_hw_color3_cfg {
22 	u8 keep_fg[DPU_STAGE_MAX];
23 };
24 
25 /**
26  *
27  * struct dpu_hw_lm_ops : Interface to the mixer Hw driver functions
28  *  Assumption is these functions will be called after clocks are enabled
29  */
30 struct dpu_hw_lm_ops {
31 	/*
32 	 * Sets up mixer output width and height
33 	 * and border color if enabled
34 	 */
35 	void (*setup_mixer_out)(struct dpu_hw_mixer *ctx,
36 		struct dpu_hw_mixer_cfg *cfg);
37 
38 	/*
39 	 * Alpha blending configuration
40 	 * for the specified stage
41 	 */
42 	void (*setup_blend_config)(struct dpu_hw_mixer *ctx, uint32_t stage,
43 		uint32_t fg_alpha, uint32_t bg_alpha, uint32_t blend_op);
44 
45 	/*
46 	 * Alpha color component selection from either fg or bg
47 	 */
48 	void (*setup_alpha_out)(struct dpu_hw_mixer *ctx, uint32_t mixer_op);
49 
50 	/**
51 	 * setup_border_color : enable/disable border color
52 	 */
53 	void (*setup_border_color)(struct dpu_hw_mixer *ctx,
54 		struct dpu_mdss_color *color,
55 		u8 border_en);
56 
57 	/**
58 	 * setup_misr: Enable/disable MISR
59 	 */
60 	void (*setup_misr)(struct dpu_hw_mixer *ctx, bool enable, u32 frame_count);
61 
62 	/**
63 	 * collect_misr: Read MISR signature
64 	 */
65 	int (*collect_misr)(struct dpu_hw_mixer *ctx, u32 *misr_value);
66 };
67 
68 struct dpu_hw_mixer {
69 	struct dpu_hw_blk base;
70 	struct dpu_hw_blk_reg_map hw;
71 
72 	/* lm */
73 	enum dpu_lm  idx;
74 	const struct dpu_lm_cfg   *cap;
75 	const struct dpu_mdp_cfg  *mdp;
76 	const struct dpu_ctl_cfg  *ctl;
77 
78 	/* ops */
79 	struct dpu_hw_lm_ops ops;
80 
81 	/* store mixer info specific to display */
82 	struct dpu_hw_mixer_cfg cfg;
83 };
84 
85 /**
86  * to_dpu_hw_mixer - convert base object dpu_hw_base to container
87  * @hw: Pointer to base hardware block
88  * return: Pointer to hardware block container
89  */
90 static inline struct dpu_hw_mixer *to_dpu_hw_mixer(struct dpu_hw_blk *hw)
91 {
92 	return container_of(hw, struct dpu_hw_mixer, base);
93 }
94 
95 /**
96  * dpu_hw_lm_init() - Initializes the mixer hw driver object.
97  * should be called once before accessing every mixer.
98  * @cfg:  mixer catalog entry for which driver object is required
99  * @addr: mapped register io address of MDP
100  */
101 struct dpu_hw_mixer *dpu_hw_lm_init(const struct dpu_lm_cfg *cfg,
102 		void __iomem *addr);
103 
104 /**
105  * dpu_hw_lm_destroy(): Destroys layer mixer driver context
106  * @lm:   Pointer to LM driver context
107  */
108 void dpu_hw_lm_destroy(struct dpu_hw_mixer *lm);
109 
110 #endif /*_DPU_HW_LM_H */
111