xref: /linux/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h (revision 4359a011e259a4608afc7fb3635370c9d4ba5943)
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /*
3  * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
4  * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
5  * Copyright (C) 2013 Red Hat
6  * Author: Rob Clark <robdclark@gmail.com>
7  */
8 
9 #ifndef __DPU_ENCODER_H__
10 #define __DPU_ENCODER_H__
11 
12 #include <drm/drm_crtc.h>
13 #include "dpu_hw_mdss.h"
14 
15 #define DPU_ENCODER_FRAME_EVENT_DONE			BIT(0)
16 #define DPU_ENCODER_FRAME_EVENT_ERROR			BIT(1)
17 #define DPU_ENCODER_FRAME_EVENT_PANEL_DEAD		BIT(2)
18 #define DPU_ENCODER_FRAME_EVENT_IDLE			BIT(3)
19 
20 #define IDLE_TIMEOUT	(66 - 16/2)
21 
22 /**
23  * struct msm_display_info - defines display properties
24  * @intf_type:          DRM_MODE_ENCODER_ type
25  * @num_of_h_tiles:     Number of horizontal tiles in case of split interface
26  * @h_tile_instance:    Controller instance used per tile. Number of elements is
27  *                      based on num_of_h_tiles
28  * @is_cmd_mode		Boolean to indicate if the CMD mode is requested
29  * @is_te_using_watchdog_timer:  Boolean to indicate watchdog TE is
30  *				 used instead of panel TE in cmd mode panels
31  * @dsc:		DSC configuration data for DSC-enabled displays
32  */
33 struct msm_display_info {
34 	int intf_type;
35 	uint32_t num_of_h_tiles;
36 	uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY];
37 	bool is_cmd_mode;
38 	bool is_te_using_watchdog_timer;
39 	struct msm_display_dsc_config *dsc;
40 };
41 
42 /**
43  * dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to
44  * @encoder:	encoder pointer
45  * @crtc:	crtc pointer
46  */
47 void dpu_encoder_assign_crtc(struct drm_encoder *encoder,
48 			     struct drm_crtc *crtc);
49 
50 /**
51  * dpu_encoder_toggle_vblank_for_crtc - Toggles vblank interrupts on or off if
52  *	the encoder is assigned to the given crtc
53  * @encoder:	encoder pointer
54  * @crtc:	crtc pointer
55  * @enable:	true if vblank should be enabled
56  */
57 void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *encoder,
58 					struct drm_crtc *crtc, bool enable);
59 
60 /**
61  * dpu_encoder_register_frame_event_callback - provide callback to encoder that
62  *	will be called after the request is complete, or other events.
63  * @encoder:	encoder pointer
64  * @cb:		callback pointer, provide NULL to deregister
65  * @data:	user data provided to callback
66  */
67 void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder,
68 		void (*cb)(void *, u32), void *data);
69 
70 /**
71  * dpu_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl
72  *	path (i.e. ctl flush and start) at next appropriate time.
73  *	Immediately: if no previous commit is outstanding.
74  *	Delayed: Block until next trigger can be issued.
75  * @encoder:	encoder pointer
76  */
77 void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder);
78 
79 /**
80  * dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous
81  *        kickoff and trigger the ctl prepare progress for command mode display.
82  * @encoder:	encoder pointer
83  */
84 void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *encoder);
85 
86 /**
87  * dpu_encoder_kickoff - trigger a double buffer flip of the ctl path
88  *	(i.e. ctl flush and start) immediately.
89  * @encoder:	encoder pointer
90  */
91 void dpu_encoder_kickoff(struct drm_encoder *encoder);
92 
93 /**
94  * dpu_encoder_wakeup_time - get the time of the next vsync
95  */
96 int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time);
97 
98 /**
99  * dpu_encoder_wait_for_event - Waits for encoder events
100  * @encoder:	encoder pointer
101  * @event:      event to wait for
102  * MSM_ENC_COMMIT_DONE -  Wait for hardware to have flushed the current pending
103  *                        frames to hardware at a vblank or ctl_start
104  *                        Encoders will map this differently depending on the
105  *                        panel type.
106  *	                  vid mode -> vsync_irq
107  *                        cmd mode -> ctl_start
108  * MSM_ENC_TX_COMPLETE -  Wait for the hardware to transfer all the pixels to
109  *                        the panel. Encoders will map this differently
110  *                        depending on the panel type.
111  *                        vid mode -> vsync_irq
112  *                        cmd mode -> pp_done
113  * Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise
114  */
115 int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder,
116 						enum msm_event_wait event);
117 
118 /*
119  * dpu_encoder_get_intf_mode - get interface mode of the given encoder
120  * @encoder: Pointer to drm encoder object
121  */
122 enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder);
123 
124 /**
125  * dpu_encoder_virt_runtime_resume - pm runtime resume the encoder configs
126  * @encoder:	encoder pointer
127  */
128 void dpu_encoder_virt_runtime_resume(struct drm_encoder *encoder);
129 
130 /**
131  * dpu_encoder_init - initialize virtual encoder object
132  * @dev:        Pointer to drm device structure
133  * @disp_info:  Pointer to display information structure
134  * Returns:     Pointer to newly created drm encoder
135  */
136 struct drm_encoder *dpu_encoder_init(
137 		struct drm_device *dev,
138 		int drm_enc_mode);
139 
140 /**
141  * dpu_encoder_setup - setup dpu_encoder for the display probed
142  * @dev:		Pointer to drm device structure
143  * @enc:		Pointer to the drm_encoder
144  * @disp_info:	Pointer to the display info
145  */
146 int dpu_encoder_setup(struct drm_device *dev, struct drm_encoder *enc,
147 		struct msm_display_info *disp_info);
148 
149 /**
150  * dpu_encoder_prepare_commit - prepare encoder at the very beginning of an
151  *	atomic commit, before any registers are written
152  * @drm_enc:    Pointer to previously created drm encoder structure
153  */
154 void dpu_encoder_prepare_commit(struct drm_encoder *drm_enc);
155 
156 /**
157  * dpu_encoder_set_idle_timeout - set the idle timeout for video
158  *                    and command mode encoders.
159  * @drm_enc:    Pointer to previously created drm encoder structure
160  * @idle_timeout:    idle timeout duration in milliseconds
161  */
162 void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc,
163 							u32 idle_timeout);
164 /**
165  * dpu_encoder_get_linecount - get interface line count for the encoder.
166  * @drm_enc:    Pointer to previously created drm encoder structure
167  */
168 int dpu_encoder_get_linecount(struct drm_encoder *drm_enc);
169 
170 /**
171  * dpu_encoder_get_vsync_count - get vsync count for the encoder.
172  * @drm_enc:    Pointer to previously created drm encoder structure
173  */
174 int dpu_encoder_get_vsync_count(struct drm_encoder *drm_enc);
175 
176 bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc);
177 
178 /**
179  * dpu_encoder_get_crc_values_cnt - get number of physical encoders contained
180  *	in virtual encoder that can collect CRC values
181  * @drm_enc:    Pointer to previously created drm encoder structure
182  * Returns:     Number of physical encoders for given drm encoder
183  */
184 int dpu_encoder_get_crc_values_cnt(const struct drm_encoder *drm_enc);
185 
186 /**
187  * dpu_encoder_setup_misr - enable misr calculations
188  * @drm_enc:    Pointer to previously created drm encoder structure
189  */
190 void dpu_encoder_setup_misr(const struct drm_encoder *drm_encoder);
191 
192 /**
193  * dpu_encoder_get_crc - get the crc value from interface blocks
194  * @drm_enc:    Pointer to previously created drm encoder structure
195  * Returns:     0 on success, error otherwise
196  */
197 int dpu_encoder_get_crc(const struct drm_encoder *drm_enc, u32 *crcs, int pos);
198 
199 /**
200  * dpu_encoder_use_dsc_merge - returns true if the encoder uses DSC merge topology.
201  * @drm_enc:    Pointer to previously created drm encoder structure
202  */
203 bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc);
204 
205 /**
206  * dpu_encoder_prepare_wb_job - prepare writeback job for the encoder.
207  * @drm_enc:    Pointer to previously created drm encoder structure
208  * @job:        Pointer to the current drm writeback job
209  */
210 void dpu_encoder_prepare_wb_job(struct drm_encoder *drm_enc,
211 		struct drm_writeback_job *job);
212 
213 /**
214  * dpu_encoder_cleanup_wb_job - cleanup writeback job for the encoder.
215  * @drm_enc:    Pointer to previously created drm encoder structure
216  * @job:        Pointer to the current drm writeback job
217  */
218 void dpu_encoder_cleanup_wb_job(struct drm_encoder *drm_enc,
219 		struct drm_writeback_job *job);
220 
221 /**
222  * dpu_encoder_is_valid_for_commit - check if encode has valid parameters for commit.
223  * @drm_enc:    Pointer to drm encoder structure
224  */
225 bool dpu_encoder_is_valid_for_commit(struct drm_encoder *drm_enc);
226 
227 #endif /* __DPU_ENCODER_H__ */
228