1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved. 4 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. 5 * Copyright (C) 2013 Red Hat 6 * Author: Rob Clark <robdclark@gmail.com> 7 */ 8 9 #ifndef __DPU_ENCODER_H__ 10 #define __DPU_ENCODER_H__ 11 12 #include <drm/drm_crtc.h> 13 #include "dpu_hw_mdss.h" 14 15 #define DPU_ENCODER_FRAME_EVENT_DONE BIT(0) 16 #define DPU_ENCODER_FRAME_EVENT_ERROR BIT(1) 17 #define DPU_ENCODER_FRAME_EVENT_PANEL_DEAD BIT(2) 18 #define DPU_ENCODER_FRAME_EVENT_IDLE BIT(3) 19 20 #define IDLE_TIMEOUT (66 - 16/2) 21 22 /** 23 * struct msm_display_info - defines display properties 24 * @intf_type: INTF_ type 25 * @num_of_h_tiles: Number of horizontal tiles in case of split interface 26 * @h_tile_instance: Controller instance used per tile. Number of elements is 27 * based on num_of_h_tiles 28 * @is_cmd_mode Boolean to indicate if the CMD mode is requested 29 * @is_te_using_watchdog_timer: Boolean to indicate watchdog TE is 30 * used instead of panel TE in cmd mode panels 31 */ 32 struct msm_display_info { 33 enum dpu_intf_type intf_type; 34 uint32_t num_of_h_tiles; 35 uint32_t h_tile_instance[MAX_H_TILES_PER_DISPLAY]; 36 bool is_cmd_mode; 37 bool is_te_using_watchdog_timer; 38 }; 39 40 /** 41 * dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to 42 * @encoder: encoder pointer 43 * @crtc: crtc pointer 44 */ 45 void dpu_encoder_assign_crtc(struct drm_encoder *encoder, 46 struct drm_crtc *crtc); 47 48 /** 49 * dpu_encoder_toggle_vblank_for_crtc - Toggles vblank interrupts on or off if 50 * the encoder is assigned to the given crtc 51 * @encoder: encoder pointer 52 * @crtc: crtc pointer 53 * @enable: true if vblank should be enabled 54 */ 55 void dpu_encoder_toggle_vblank_for_crtc(struct drm_encoder *encoder, 56 struct drm_crtc *crtc, bool enable); 57 58 /** 59 * dpu_encoder_register_frame_event_callback - provide callback to encoder that 60 * will be called after the request is complete, or other events. 61 * @encoder: encoder pointer 62 * @cb: callback pointer, provide NULL to deregister 63 * @data: user data provided to callback 64 */ 65 void dpu_encoder_register_frame_event_callback(struct drm_encoder *encoder, 66 void (*cb)(void *, u32), void *data); 67 68 /** 69 * dpu_encoder_prepare_for_kickoff - schedule double buffer flip of the ctl 70 * path (i.e. ctl flush and start) at next appropriate time. 71 * Immediately: if no previous commit is outstanding. 72 * Delayed: Block until next trigger can be issued. 73 * @encoder: encoder pointer 74 */ 75 void dpu_encoder_prepare_for_kickoff(struct drm_encoder *encoder); 76 77 /** 78 * dpu_encoder_trigger_kickoff_pending - Clear the flush bits from previous 79 * kickoff and trigger the ctl prepare progress for command mode display. 80 * @encoder: encoder pointer 81 */ 82 void dpu_encoder_trigger_kickoff_pending(struct drm_encoder *encoder); 83 84 /** 85 * dpu_encoder_kickoff - trigger a double buffer flip of the ctl path 86 * (i.e. ctl flush and start) immediately. 87 * @encoder: encoder pointer 88 */ 89 void dpu_encoder_kickoff(struct drm_encoder *encoder); 90 91 /** 92 * dpu_encoder_wakeup_time - get the time of the next vsync 93 */ 94 int dpu_encoder_vsync_time(struct drm_encoder *drm_enc, ktime_t *wakeup_time); 95 96 /** 97 * dpu_encoder_wait_for_event - Waits for encoder events 98 * @encoder: encoder pointer 99 * @event: event to wait for 100 * MSM_ENC_COMMIT_DONE - Wait for hardware to have flushed the current pending 101 * frames to hardware at a vblank or ctl_start 102 * Encoders will map this differently depending on the 103 * panel type. 104 * vid mode -> vsync_irq 105 * cmd mode -> ctl_start 106 * MSM_ENC_TX_COMPLETE - Wait for the hardware to transfer all the pixels to 107 * the panel. Encoders will map this differently 108 * depending on the panel type. 109 * vid mode -> vsync_irq 110 * cmd mode -> pp_done 111 * Returns: 0 on success, -EWOULDBLOCK if already signaled, error otherwise 112 */ 113 int dpu_encoder_wait_for_event(struct drm_encoder *drm_encoder, 114 enum msm_event_wait event); 115 116 /* 117 * dpu_encoder_get_intf_mode - get interface mode of the given encoder 118 * @encoder: Pointer to drm encoder object 119 */ 120 enum dpu_intf_mode dpu_encoder_get_intf_mode(struct drm_encoder *encoder); 121 122 /** 123 * dpu_encoder_virt_runtime_resume - pm runtime resume the encoder configs 124 * @encoder: encoder pointer 125 */ 126 void dpu_encoder_virt_runtime_resume(struct drm_encoder *encoder); 127 128 /** 129 * dpu_encoder_init - initialize virtual encoder object 130 * @dev: Pointer to drm device structure 131 * @drm_enc_mode: corresponding DRM_MODE_ENCODER_* constant 132 * @disp_info: Pointer to display information structure 133 * Returns: Pointer to newly created drm encoder 134 */ 135 struct drm_encoder *dpu_encoder_init(struct drm_device *dev, 136 int drm_enc_mode, 137 struct msm_display_info *disp_info); 138 139 /** 140 * dpu_encoder_set_idle_timeout - set the idle timeout for video 141 * and command mode encoders. 142 * @drm_enc: Pointer to previously created drm encoder structure 143 * @idle_timeout: idle timeout duration in milliseconds 144 */ 145 void dpu_encoder_set_idle_timeout(struct drm_encoder *drm_enc, 146 u32 idle_timeout); 147 /** 148 * dpu_encoder_get_linecount - get interface line count for the encoder. 149 * @drm_enc: Pointer to previously created drm encoder structure 150 */ 151 int dpu_encoder_get_linecount(struct drm_encoder *drm_enc); 152 153 /** 154 * dpu_encoder_get_vsync_count - get vsync count for the encoder. 155 * @drm_enc: Pointer to previously created drm encoder structure 156 */ 157 int dpu_encoder_get_vsync_count(struct drm_encoder *drm_enc); 158 159 bool dpu_encoder_is_widebus_enabled(const struct drm_encoder *drm_enc); 160 161 /** 162 * dpu_encoder_get_crc_values_cnt - get number of physical encoders contained 163 * in virtual encoder that can collect CRC values 164 * @drm_enc: Pointer to previously created drm encoder structure 165 * Returns: Number of physical encoders for given drm encoder 166 */ 167 int dpu_encoder_get_crc_values_cnt(const struct drm_encoder *drm_enc); 168 169 /** 170 * dpu_encoder_setup_misr - enable misr calculations 171 * @drm_enc: Pointer to previously created drm encoder structure 172 */ 173 void dpu_encoder_setup_misr(const struct drm_encoder *drm_encoder); 174 175 /** 176 * dpu_encoder_get_crc - get the crc value from interface blocks 177 * @drm_enc: Pointer to previously created drm encoder structure 178 * Returns: 0 on success, error otherwise 179 */ 180 int dpu_encoder_get_crc(const struct drm_encoder *drm_enc, u32 *crcs, int pos); 181 182 /** 183 * dpu_encoder_use_dsc_merge - returns true if the encoder uses DSC merge topology. 184 * @drm_enc: Pointer to previously created drm encoder structure 185 */ 186 bool dpu_encoder_use_dsc_merge(struct drm_encoder *drm_enc); 187 188 /** 189 * dpu_encoder_prepare_wb_job - prepare writeback job for the encoder. 190 * @drm_enc: Pointer to previously created drm encoder structure 191 * @job: Pointer to the current drm writeback job 192 */ 193 void dpu_encoder_prepare_wb_job(struct drm_encoder *drm_enc, 194 struct drm_writeback_job *job); 195 196 /** 197 * dpu_encoder_cleanup_wb_job - cleanup writeback job for the encoder. 198 * @drm_enc: Pointer to previously created drm encoder structure 199 * @job: Pointer to the current drm writeback job 200 */ 201 void dpu_encoder_cleanup_wb_job(struct drm_encoder *drm_enc, 202 struct drm_writeback_job *job); 203 204 /** 205 * dpu_encoder_is_valid_for_commit - check if encode has valid parameters for commit. 206 * @drm_enc: Pointer to drm encoder structure 207 */ 208 bool dpu_encoder_is_valid_for_commit(struct drm_encoder *drm_enc); 209 210 #endif /* __DPU_ENCODER_H__ */ 211