1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2013-2014 Red Hat 4 * Author: Rob Clark <robdclark@gmail.com> 5 * 6 * Copyright (c) 2014,2017 The Linux Foundation. All rights reserved. 7 */ 8 9 #include "adreno_gpu.h" 10 11 static const struct adreno_info a3xx_gpus[] = { 12 { 13 .chip_ids = ADRENO_CHIP_IDS(0x03000512), 14 .family = ADRENO_3XX, 15 .fw = { 16 [ADRENO_FW_PM4] = "a330_pm4.fw", 17 [ADRENO_FW_PFP] = "a330_pfp.fw", 18 }, 19 .gmem = SZ_128K, 20 .inactive_period = DRM_MSM_INACTIVE_PERIOD, 21 .init = a3xx_gpu_init, 22 }, { 23 .chip_ids = ADRENO_CHIP_IDS(0x03000520), 24 .family = ADRENO_3XX, 25 .revn = 305, 26 .fw = { 27 [ADRENO_FW_PM4] = "a300_pm4.fw", 28 [ADRENO_FW_PFP] = "a300_pfp.fw", 29 }, 30 .gmem = SZ_256K, 31 .inactive_period = DRM_MSM_INACTIVE_PERIOD, 32 .init = a3xx_gpu_init, 33 }, { 34 .chip_ids = ADRENO_CHIP_IDS(0x03000600), 35 .family = ADRENO_3XX, 36 .revn = 307, /* because a305c is revn==306 */ 37 .fw = { 38 [ADRENO_FW_PM4] = "a300_pm4.fw", 39 [ADRENO_FW_PFP] = "a300_pfp.fw", 40 }, 41 .gmem = SZ_128K, 42 .inactive_period = DRM_MSM_INACTIVE_PERIOD, 43 .init = a3xx_gpu_init, 44 }, { 45 .chip_ids = ADRENO_CHIP_IDS( 46 0x03020000, 47 0x03020001, 48 0x03020002 49 ), 50 .family = ADRENO_3XX, 51 .revn = 320, 52 .fw = { 53 [ADRENO_FW_PM4] = "a300_pm4.fw", 54 [ADRENO_FW_PFP] = "a300_pfp.fw", 55 }, 56 .gmem = SZ_512K, 57 .inactive_period = DRM_MSM_INACTIVE_PERIOD, 58 .init = a3xx_gpu_init, 59 }, { 60 .chip_ids = ADRENO_CHIP_IDS( 61 0x03030000, 62 0x03030001, 63 0x03030002 64 ), 65 .family = ADRENO_3XX, 66 .revn = 330, 67 .fw = { 68 [ADRENO_FW_PM4] = "a330_pm4.fw", 69 [ADRENO_FW_PFP] = "a330_pfp.fw", 70 }, 71 .gmem = SZ_1M, 72 .inactive_period = DRM_MSM_INACTIVE_PERIOD, 73 .init = a3xx_gpu_init, 74 } 75 }; 76 DECLARE_ADRENO_GPULIST(a3xx); 77 78 MODULE_FIRMWARE("qcom/a300_pm4.fw"); 79 MODULE_FIRMWARE("qcom/a300_pfp.fw"); 80 MODULE_FIRMWARE("qcom/a330_pm4.fw"); 81 MODULE_FIRMWARE("qcom/a330_pfp.fw"); 82