1 // SPDX-License-Identifier: GPL-2.0-only 2 3 #include <linux/pci.h> 4 5 #include <drm/drm_atomic.h> 6 #include <drm/drm_atomic_helper.h> 7 #include <drm/drm_drv.h> 8 #include <drm/drm_gem_atomic_helper.h> 9 #include <drm/drm_probe_helper.h> 10 11 #include "mgag200_ddc.h" 12 #include "mgag200_drv.h" 13 14 static void mgag200_g200ew3_init_registers(struct mga_device *mdev) 15 { 16 mgag200_g200wb_init_registers(mdev); // same as G200WB 17 18 WREG_ECRT(0x34, 0x5); // G200EW3 specific 19 } 20 21 /* 22 * PIXPLLC 23 */ 24 25 static int mgag200_g200ew3_pixpllc_atomic_check(struct drm_crtc *crtc, 26 struct drm_atomic_state *new_state) 27 { 28 static const unsigned int vcomax = 800000; 29 static const unsigned int vcomin = 400000; 30 static const unsigned int pllreffreq = 25000; 31 32 struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc); 33 struct mgag200_crtc_state *new_mgag200_crtc_state = to_mgag200_crtc_state(new_crtc_state); 34 long clock = new_crtc_state->mode.clock; 35 struct mgag200_pll_values *pixpllc = &new_mgag200_crtc_state->pixpllc; 36 unsigned int delta, tmpdelta; 37 unsigned int testp, testm, testn, testp2; 38 unsigned int p, m, n, s; 39 unsigned int computed; 40 41 m = n = p = s = 0; 42 delta = 0xffffffff; 43 44 for (testp = 1; testp < 8; testp++) { 45 for (testp2 = 1; testp2 < 8; testp2++) { 46 if (testp < testp2) 47 continue; 48 if ((clock * testp * testp2) > vcomax) 49 continue; 50 if ((clock * testp * testp2) < vcomin) 51 continue; 52 for (testm = 1; testm < 26; testm++) { 53 for (testn = 32; testn < 2048 ; testn++) { 54 computed = (pllreffreq * testn) / (testm * testp * testp2); 55 if (computed > clock) 56 tmpdelta = computed - clock; 57 else 58 tmpdelta = clock - computed; 59 if (tmpdelta < delta) { 60 delta = tmpdelta; 61 m = testm + 1; 62 n = testn + 1; 63 p = testp + 1; 64 s = testp2; 65 } 66 } 67 } 68 } 69 } 70 71 pixpllc->m = m; 72 pixpllc->n = n; 73 pixpllc->p = p; 74 pixpllc->s = s; 75 76 return 0; 77 } 78 79 /* 80 * Mode-setting pipeline 81 */ 82 83 static const struct drm_plane_helper_funcs mgag200_g200ew3_primary_plane_helper_funcs = { 84 MGAG200_PRIMARY_PLANE_HELPER_FUNCS, 85 }; 86 87 static const struct drm_plane_funcs mgag200_g200ew3_primary_plane_funcs = { 88 MGAG200_PRIMARY_PLANE_FUNCS, 89 }; 90 91 static const struct drm_crtc_helper_funcs mgag200_g200ew3_crtc_helper_funcs = { 92 MGAG200_CRTC_HELPER_FUNCS, 93 }; 94 95 static const struct drm_crtc_funcs mgag200_g200ew3_crtc_funcs = { 96 MGAG200_CRTC_FUNCS, 97 }; 98 99 static const struct drm_encoder_funcs mgag200_g200ew3_dac_encoder_funcs = { 100 MGAG200_DAC_ENCODER_FUNCS, 101 }; 102 103 static const struct drm_connector_helper_funcs mgag200_g200ew3_vga_connector_helper_funcs = { 104 MGAG200_VGA_CONNECTOR_HELPER_FUNCS, 105 }; 106 107 static const struct drm_connector_funcs mgag200_g200ew3_vga_connector_funcs = { 108 MGAG200_VGA_CONNECTOR_FUNCS, 109 }; 110 111 static int mgag200_g200ew3_pipeline_init(struct mga_device *mdev) 112 { 113 struct drm_device *dev = &mdev->base; 114 struct drm_plane *primary_plane = &mdev->primary_plane; 115 struct drm_crtc *crtc = &mdev->crtc; 116 struct drm_encoder *encoder = &mdev->encoder; 117 struct drm_connector *connector = &mdev->connector; 118 struct i2c_adapter *ddc; 119 int ret; 120 121 ret = drm_universal_plane_init(dev, primary_plane, 0, 122 &mgag200_g200ew3_primary_plane_funcs, 123 mgag200_primary_plane_formats, 124 mgag200_primary_plane_formats_size, 125 mgag200_primary_plane_fmtmods, 126 DRM_PLANE_TYPE_PRIMARY, NULL); 127 if (ret) { 128 drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret); 129 return ret; 130 } 131 drm_plane_helper_add(primary_plane, &mgag200_g200ew3_primary_plane_helper_funcs); 132 drm_plane_enable_fb_damage_clips(primary_plane); 133 134 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 135 &mgag200_g200ew3_crtc_funcs, NULL); 136 if (ret) { 137 drm_err(dev, "drm_crtc_init_with_planes() failed: %d\n", ret); 138 return ret; 139 } 140 drm_crtc_helper_add(crtc, &mgag200_g200ew3_crtc_helper_funcs); 141 142 /* FIXME: legacy gamma tables, but atomic gamma doesn't work without */ 143 drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE); 144 drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE); 145 146 encoder->possible_crtcs = drm_crtc_mask(crtc); 147 ret = drm_encoder_init(dev, encoder, &mgag200_g200ew3_dac_encoder_funcs, 148 DRM_MODE_ENCODER_DAC, NULL); 149 if (ret) { 150 drm_err(dev, "drm_encoder_init() failed: %d\n", ret); 151 return ret; 152 } 153 154 ddc = mgag200_ddc_create(mdev); 155 if (IS_ERR(ddc)) { 156 ret = PTR_ERR(ddc); 157 drm_err(dev, "failed to add DDC bus: %d\n", ret); 158 return ret; 159 } 160 161 ret = drm_connector_init_with_ddc(dev, connector, 162 &mgag200_g200ew3_vga_connector_funcs, 163 DRM_MODE_CONNECTOR_VGA, ddc); 164 if (ret) { 165 drm_err(dev, "drm_connector_init_with_ddc() failed: %d\n", ret); 166 return ret; 167 } 168 drm_connector_helper_add(connector, &mgag200_g200ew3_vga_connector_helper_funcs); 169 170 ret = drm_connector_attach_encoder(connector, encoder); 171 if (ret) { 172 drm_err(dev, "drm_connector_attach_encoder() failed: %d\n", ret); 173 return ret; 174 } 175 176 return 0; 177 } 178 179 /* 180 * DRM device 181 */ 182 183 static const struct mgag200_device_info mgag200_g200ew3_device_info = 184 MGAG200_DEVICE_INFO_INIT(2048, 2048, 0, true, 0, 1, false); 185 186 static const struct mgag200_device_funcs mgag200_g200ew3_device_funcs = { 187 .disable_vidrst = mgag200_bmc_disable_vidrst, 188 .enable_vidrst = mgag200_bmc_enable_vidrst, 189 .pixpllc_atomic_check = mgag200_g200ew3_pixpllc_atomic_check, 190 .pixpllc_atomic_update = mgag200_g200wb_pixpllc_atomic_update, // same as G200WB 191 }; 192 193 static resource_size_t mgag200_g200ew3_device_probe_vram(struct mga_device *mdev) 194 { 195 resource_size_t vram_size = resource_size(mdev->vram_res); 196 197 if (vram_size >= 0x1000000) 198 vram_size = vram_size - 0x400000; 199 return mgag200_probe_vram(mdev->vram, vram_size); 200 } 201 202 struct mga_device *mgag200_g200ew3_device_create(struct pci_dev *pdev, 203 const struct drm_driver *drv) 204 { 205 struct mga_device *mdev; 206 struct drm_device *dev; 207 resource_size_t vram_available; 208 int ret; 209 210 mdev = devm_drm_dev_alloc(&pdev->dev, drv, struct mga_device, base); 211 if (IS_ERR(mdev)) 212 return mdev; 213 dev = &mdev->base; 214 215 pci_set_drvdata(pdev, dev); 216 217 ret = mgag200_init_pci_options(pdev, 0x41049120, 0x0000b000); 218 if (ret) 219 return ERR_PTR(ret); 220 221 ret = mgag200_device_preinit(mdev); 222 if (ret) 223 return ERR_PTR(ret); 224 225 ret = mgag200_device_init(mdev, &mgag200_g200ew3_device_info, 226 &mgag200_g200ew3_device_funcs); 227 if (ret) 228 return ERR_PTR(ret); 229 230 mgag200_g200ew3_init_registers(mdev); 231 232 vram_available = mgag200_g200ew3_device_probe_vram(mdev); 233 234 ret = mgag200_mode_config_init(mdev, vram_available); 235 if (ret) 236 return ERR_PTR(ret); 237 238 ret = mgag200_g200ew3_pipeline_init(mdev); 239 if (ret) 240 return ERR_PTR(ret); 241 242 drm_mode_config_reset(dev); 243 244 return mdev; 245 } 246