1 // SPDX-License-Identifier: GPL-2.0-only 2 3 #include <linux/pci.h> 4 5 #include <drm/drm_atomic.h> 6 #include <drm/drm_atomic_helper.h> 7 #include <drm/drm_drv.h> 8 #include <drm/drm_gem_atomic_helper.h> 9 #include <drm/drm_probe_helper.h> 10 11 #include "mgag200_drv.h" 12 13 /* 14 * PIXPLLC 15 */ 16 17 static int mgag200_g200eh3_pixpllc_atomic_check(struct drm_crtc *crtc, 18 struct drm_atomic_state *new_state) 19 { 20 static const unsigned int vcomax = 3000000; 21 static const unsigned int vcomin = 1500000; 22 static const unsigned int pllreffreq = 25000; 23 24 struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc); 25 struct mgag200_crtc_state *new_mgag200_crtc_state = to_mgag200_crtc_state(new_crtc_state); 26 long clock = new_crtc_state->mode.clock; 27 struct mgag200_pll_values *pixpllc = &new_mgag200_crtc_state->pixpllc; 28 unsigned int delta, tmpdelta; 29 unsigned int testp, testm, testn; 30 unsigned int p, m, n, s; 31 unsigned int computed; 32 33 m = n = p = s = 0; 34 delta = 0xffffffff; 35 testp = 0; 36 37 for (testm = 150; testm >= 6; testm--) { 38 if (clock * testm > vcomax) 39 continue; 40 if (clock * testm < vcomin) 41 continue; 42 for (testn = 120; testn >= 60; testn--) { 43 computed = (pllreffreq * testn) / testm; 44 if (computed > clock) 45 tmpdelta = computed - clock; 46 else 47 tmpdelta = clock - computed; 48 if (tmpdelta < delta) { 49 delta = tmpdelta; 50 n = testn + 1; 51 m = testm + 1; 52 p = testp + 1; 53 } 54 if (delta == 0) 55 break; 56 } 57 if (delta == 0) 58 break; 59 } 60 61 pixpllc->m = m; 62 pixpllc->n = n; 63 pixpllc->p = p; 64 pixpllc->s = s; 65 66 return 0; 67 } 68 69 /* 70 * Mode-setting pipeline 71 */ 72 73 static const struct drm_plane_helper_funcs mgag200_g200eh3_primary_plane_helper_funcs = { 74 MGAG200_PRIMARY_PLANE_HELPER_FUNCS, 75 }; 76 77 static const struct drm_plane_funcs mgag200_g200eh3_primary_plane_funcs = { 78 MGAG200_PRIMARY_PLANE_FUNCS, 79 }; 80 81 static const struct drm_crtc_helper_funcs mgag200_g200eh3_crtc_helper_funcs = { 82 MGAG200_CRTC_HELPER_FUNCS, 83 }; 84 85 static const struct drm_crtc_funcs mgag200_g200eh3_crtc_funcs = { 86 MGAG200_CRTC_FUNCS, 87 }; 88 89 static int mgag200_g200eh3_pipeline_init(struct mga_device *mdev) 90 { 91 struct drm_device *dev = &mdev->base; 92 struct drm_plane *primary_plane = &mdev->primary_plane; 93 struct drm_crtc *crtc = &mdev->crtc; 94 int ret; 95 96 ret = drm_universal_plane_init(dev, primary_plane, 0, 97 &mgag200_g200eh3_primary_plane_funcs, 98 mgag200_primary_plane_formats, 99 mgag200_primary_plane_formats_size, 100 mgag200_primary_plane_fmtmods, 101 DRM_PLANE_TYPE_PRIMARY, NULL); 102 if (ret) { 103 drm_err(dev, "drm_universal_plane_init() failed: %d\n", ret); 104 return ret; 105 } 106 drm_plane_helper_add(primary_plane, &mgag200_g200eh3_primary_plane_helper_funcs); 107 drm_plane_enable_fb_damage_clips(primary_plane); 108 109 ret = drm_crtc_init_with_planes(dev, crtc, primary_plane, NULL, 110 &mgag200_g200eh3_crtc_funcs, NULL); 111 if (ret) { 112 drm_err(dev, "drm_crtc_init_with_planes() failed: %d\n", ret); 113 return ret; 114 } 115 drm_crtc_helper_add(crtc, &mgag200_g200eh3_crtc_helper_funcs); 116 117 /* FIXME: legacy gamma tables, but atomic gamma doesn't work without */ 118 drm_mode_crtc_set_gamma_size(crtc, MGAG200_LUT_SIZE); 119 drm_crtc_enable_color_mgmt(crtc, 0, false, MGAG200_LUT_SIZE); 120 121 ret = mgag200_vga_bmc_output_init(mdev); 122 if (ret) 123 return ret; 124 125 return 0; 126 } 127 128 /* 129 * DRM device 130 */ 131 132 static const struct mgag200_device_info mgag200_g200eh3_device_info = 133 MGAG200_DEVICE_INFO_INIT(2048, 2048, 0, false, 1, 0, false); 134 135 static const struct mgag200_device_funcs mgag200_g200eh3_device_funcs = { 136 .pixpllc_atomic_check = mgag200_g200eh3_pixpllc_atomic_check, 137 .pixpllc_atomic_update = mgag200_g200eh_pixpllc_atomic_update, // same as G200EH 138 }; 139 140 struct mga_device *mgag200_g200eh3_device_create(struct pci_dev *pdev, 141 const struct drm_driver *drv) 142 { 143 struct mga_device *mdev; 144 struct drm_device *dev; 145 resource_size_t vram_available; 146 int ret; 147 148 mdev = devm_drm_dev_alloc(&pdev->dev, drv, struct mga_device, base); 149 if (IS_ERR(mdev)) 150 return mdev; 151 dev = &mdev->base; 152 153 pci_set_drvdata(pdev, dev); 154 155 ret = mgag200_init_pci_options(pdev, 0x00000120, 0x0000b000); 156 if (ret) 157 return ERR_PTR(ret); 158 159 ret = mgag200_device_preinit(mdev); 160 if (ret) 161 return ERR_PTR(ret); 162 163 ret = mgag200_device_init(mdev, &mgag200_g200eh3_device_info, 164 &mgag200_g200eh3_device_funcs); 165 if (ret) 166 return ERR_PTR(ret); 167 168 mgag200_g200eh_init_registers(mdev); // same as G200EH 169 170 vram_available = mgag200_device_probe_vram(mdev); 171 172 ret = mgag200_mode_config_init(mdev, vram_available); 173 if (ret) 174 return ERR_PTR(ret); 175 176 ret = mgag200_g200eh3_pipeline_init(mdev); 177 if (ret) 178 return ERR_PTR(ret); 179 180 drm_mode_config_reset(dev); 181 drm_kms_helper_poll_init(dev); 182 183 return mdev; 184 } 185