1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2015 Amlogic, Inc. All rights reserved. 6 */ 7 8 #include <linux/clk.h> 9 #include <linux/component.h> 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/of.h> 13 #include <linux/of_graph.h> 14 #include <linux/of_platform.h> 15 #include <linux/platform_device.h> 16 #include <linux/regulator/consumer.h> 17 #include <linux/reset.h> 18 19 #include <media/cec-notifier.h> 20 21 #include <drm/drm_atomic_helper.h> 22 #include <drm/drm_bridge.h> 23 #include <drm/drm_bridge_connector.h> 24 #include <drm/drm_device.h> 25 #include <drm/drm_edid.h> 26 #include <drm/drm_probe_helper.h> 27 #include <drm/drm_simple_kms_helper.h> 28 29 #include <linux/media-bus-format.h> 30 #include <linux/videodev2.h> 31 32 #include "meson_drv.h" 33 #include "meson_registers.h" 34 #include "meson_vclk.h" 35 #include "meson_venc.h" 36 #include "meson_encoder_hdmi.h" 37 38 struct meson_encoder_hdmi { 39 struct drm_encoder encoder; 40 struct drm_bridge bridge; 41 struct drm_bridge *next_bridge; 42 struct drm_connector *connector; 43 struct meson_drm *priv; 44 unsigned long output_bus_fmt; 45 struct cec_notifier *cec_notifier; 46 }; 47 48 #define bridge_to_meson_encoder_hdmi(x) \ 49 container_of(x, struct meson_encoder_hdmi, bridge) 50 51 static int meson_encoder_hdmi_attach(struct drm_bridge *bridge, 52 enum drm_bridge_attach_flags flags) 53 { 54 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 55 56 return drm_bridge_attach(bridge->encoder, encoder_hdmi->next_bridge, 57 &encoder_hdmi->bridge, flags); 58 } 59 60 static void meson_encoder_hdmi_detach(struct drm_bridge *bridge) 61 { 62 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 63 64 cec_notifier_conn_unregister(encoder_hdmi->cec_notifier); 65 encoder_hdmi->cec_notifier = NULL; 66 } 67 68 static void meson_encoder_hdmi_set_vclk(struct meson_encoder_hdmi *encoder_hdmi, 69 const struct drm_display_mode *mode) 70 { 71 struct meson_drm *priv = encoder_hdmi->priv; 72 int vic = drm_match_cea_mode(mode); 73 unsigned long long phy_freq; 74 unsigned long long vclk_freq; 75 unsigned long long venc_freq; 76 unsigned long long hdmi_freq; 77 78 vclk_freq = mode->clock * 1000; 79 80 /* For 420, pixel clock is half unlike venc clock */ 81 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) 82 vclk_freq /= 2; 83 84 /* TMDS clock is pixel_clock * 10 */ 85 phy_freq = vclk_freq * 10; 86 87 if (!vic) { 88 meson_vclk_setup(priv, MESON_VCLK_TARGET_DMT, phy_freq, 89 vclk_freq, vclk_freq, vclk_freq, false); 90 return; 91 } 92 93 /* 480i/576i needs global pixel doubling */ 94 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 95 vclk_freq *= 2; 96 97 venc_freq = vclk_freq; 98 hdmi_freq = vclk_freq; 99 100 /* VENC double pixels for 1080i, 720p and YUV420 modes */ 101 if (meson_venc_hdmi_venc_repeat(vic) || 102 encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) 103 venc_freq *= 2; 104 105 vclk_freq = max(venc_freq, hdmi_freq); 106 107 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 108 venc_freq /= 2; 109 110 dev_dbg(priv->dev, 111 "vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz enci=%d\n", 112 phy_freq, vclk_freq, venc_freq, hdmi_freq, 113 priv->venc.hdmi_use_enci); 114 115 meson_vclk_setup(priv, MESON_VCLK_TARGET_HDMI, phy_freq, vclk_freq, 116 venc_freq, hdmi_freq, priv->venc.hdmi_use_enci); 117 } 118 119 static enum drm_mode_status meson_encoder_hdmi_mode_valid(struct drm_bridge *bridge, 120 const struct drm_display_info *display_info, 121 const struct drm_display_mode *mode) 122 { 123 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 124 struct meson_drm *priv = encoder_hdmi->priv; 125 bool is_hdmi2_sink = display_info->hdmi.scdc.supported; 126 unsigned long long clock = mode->clock * 1000; 127 unsigned long long phy_freq; 128 unsigned long long vclk_freq; 129 unsigned long long venc_freq; 130 unsigned long long hdmi_freq; 131 int vic = drm_match_cea_mode(mode); 132 enum drm_mode_status status; 133 134 dev_dbg(priv->dev, "Modeline " DRM_MODE_FMT "\n", DRM_MODE_ARG(mode)); 135 136 /* If sink does not support 540MHz, reject the non-420 HDMI2 modes */ 137 if (display_info->max_tmds_clock && 138 mode->clock > display_info->max_tmds_clock && 139 !drm_mode_is_420_only(display_info, mode) && 140 !drm_mode_is_420_also(display_info, mode)) 141 return MODE_BAD; 142 143 /* Check against non-VIC supported modes */ 144 if (!vic) { 145 status = meson_venc_hdmi_supported_mode(mode); 146 if (status != MODE_OK) 147 return status; 148 149 return meson_vclk_dmt_supported_freq(priv, clock); 150 /* Check against supported VIC modes */ 151 } else if (!meson_venc_hdmi_supported_vic(vic)) 152 return MODE_BAD; 153 154 vclk_freq = clock; 155 156 /* For 420, pixel clock is half unlike venc clock */ 157 if (drm_mode_is_420_only(display_info, mode) || 158 (!is_hdmi2_sink && 159 drm_mode_is_420_also(display_info, mode))) 160 vclk_freq /= 2; 161 162 /* TMDS clock is pixel_clock * 10 */ 163 phy_freq = vclk_freq * 10; 164 165 /* 480i/576i needs global pixel doubling */ 166 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 167 vclk_freq *= 2; 168 169 venc_freq = vclk_freq; 170 hdmi_freq = vclk_freq; 171 172 /* VENC double pixels for 1080i, 720p and YUV420 modes */ 173 if (meson_venc_hdmi_venc_repeat(vic) || 174 drm_mode_is_420_only(display_info, mode) || 175 (!is_hdmi2_sink && 176 drm_mode_is_420_also(display_info, mode))) 177 venc_freq *= 2; 178 179 vclk_freq = max(venc_freq, hdmi_freq); 180 181 if (mode->flags & DRM_MODE_FLAG_DBLCLK) 182 venc_freq /= 2; 183 184 dev_dbg(priv->dev, 185 "%s: vclk:%lluHz phy=%lluHz venc=%lluHz hdmi=%lluHz\n", 186 __func__, phy_freq, vclk_freq, venc_freq, hdmi_freq); 187 188 return meson_vclk_vic_supported_freq(priv, phy_freq, vclk_freq); 189 } 190 191 static void meson_encoder_hdmi_atomic_enable(struct drm_bridge *bridge, 192 struct drm_atomic_state *state) 193 { 194 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 195 unsigned int ycrcb_map = VPU_HDMI_OUTPUT_CBYCR; 196 struct meson_drm *priv = encoder_hdmi->priv; 197 struct drm_connector_state *conn_state; 198 const struct drm_display_mode *mode; 199 struct drm_crtc_state *crtc_state; 200 struct drm_connector *connector; 201 bool yuv420_mode = false; 202 int vic; 203 204 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); 205 if (WARN_ON(!connector)) 206 return; 207 208 conn_state = drm_atomic_get_new_connector_state(state, connector); 209 if (WARN_ON(!conn_state)) 210 return; 211 212 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); 213 if (WARN_ON(!crtc_state)) 214 return; 215 216 mode = &crtc_state->adjusted_mode; 217 218 vic = drm_match_cea_mode(mode); 219 220 dev_dbg(priv->dev, "\"%s\" vic %d\n", mode->name, vic); 221 222 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) { 223 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB; 224 yuv420_mode = true; 225 } else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16) 226 ycrcb_map = VPU_HDMI_OUTPUT_CRYCB; 227 228 /* VENC + VENC-DVI Mode setup */ 229 meson_venc_hdmi_mode_set(priv, vic, ycrcb_map, yuv420_mode, mode); 230 231 /* VCLK Set clock */ 232 meson_encoder_hdmi_set_vclk(encoder_hdmi, mode); 233 234 if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYYVYY8_0_5X24) 235 /* Setup YUV420 to HDMI-TX, no 10bit diphering */ 236 writel_relaxed(2 | (2 << 2), 237 priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); 238 else if (encoder_hdmi->output_bus_fmt == MEDIA_BUS_FMT_UYVY8_1X16) 239 /* Setup YUV422 to HDMI-TX, no 10bit diphering */ 240 writel_relaxed(1 | (2 << 2), 241 priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); 242 else 243 /* Setup YUV444 to HDMI-TX, no 10bit diphering */ 244 writel_relaxed(0, priv->io_base + _REG(VPU_HDMI_FMT_CTRL)); 245 246 dev_dbg(priv->dev, "%s\n", priv->venc.hdmi_use_enci ? "VENCI" : "VENCP"); 247 248 if (priv->venc.hdmi_use_enci) 249 writel_relaxed(1, priv->io_base + _REG(ENCI_VIDEO_EN)); 250 else 251 writel_relaxed(1, priv->io_base + _REG(ENCP_VIDEO_EN)); 252 } 253 254 static void meson_encoder_hdmi_atomic_disable(struct drm_bridge *bridge, 255 struct drm_atomic_state *state) 256 { 257 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 258 struct meson_drm *priv = encoder_hdmi->priv; 259 260 writel_bits_relaxed(0x3, 0, 261 priv->io_base + _REG(VPU_HDMI_SETTING)); 262 263 writel_relaxed(0, priv->io_base + _REG(ENCI_VIDEO_EN)); 264 writel_relaxed(0, priv->io_base + _REG(ENCP_VIDEO_EN)); 265 } 266 267 static const u32 meson_encoder_hdmi_out_bus_fmts[] = { 268 MEDIA_BUS_FMT_YUV8_1X24, 269 MEDIA_BUS_FMT_UYVY8_1X16, 270 MEDIA_BUS_FMT_UYYVYY8_0_5X24, 271 }; 272 273 static u32 * 274 meson_encoder_hdmi_get_inp_bus_fmts(struct drm_bridge *bridge, 275 struct drm_bridge_state *bridge_state, 276 struct drm_crtc_state *crtc_state, 277 struct drm_connector_state *conn_state, 278 u32 output_fmt, 279 unsigned int *num_input_fmts) 280 { 281 u32 *input_fmts = NULL; 282 int i; 283 284 *num_input_fmts = 0; 285 286 for (i = 0 ; i < ARRAY_SIZE(meson_encoder_hdmi_out_bus_fmts) ; ++i) { 287 if (output_fmt == meson_encoder_hdmi_out_bus_fmts[i]) { 288 *num_input_fmts = 1; 289 input_fmts = kcalloc(*num_input_fmts, 290 sizeof(*input_fmts), 291 GFP_KERNEL); 292 if (!input_fmts) 293 return NULL; 294 295 input_fmts[0] = output_fmt; 296 297 break; 298 } 299 } 300 301 return input_fmts; 302 } 303 304 static int meson_encoder_hdmi_atomic_check(struct drm_bridge *bridge, 305 struct drm_bridge_state *bridge_state, 306 struct drm_crtc_state *crtc_state, 307 struct drm_connector_state *conn_state) 308 { 309 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 310 struct drm_connector_state *old_conn_state = 311 drm_atomic_get_old_connector_state(conn_state->state, conn_state->connector); 312 struct meson_drm *priv = encoder_hdmi->priv; 313 314 encoder_hdmi->output_bus_fmt = bridge_state->output_bus_cfg.format; 315 316 dev_dbg(priv->dev, "output_bus_fmt %lx\n", encoder_hdmi->output_bus_fmt); 317 318 if (!drm_connector_atomic_hdr_metadata_equal(old_conn_state, conn_state)) 319 crtc_state->mode_changed = true; 320 321 return 0; 322 } 323 324 static void meson_encoder_hdmi_hpd_notify(struct drm_bridge *bridge, 325 enum drm_connector_status status) 326 { 327 struct meson_encoder_hdmi *encoder_hdmi = bridge_to_meson_encoder_hdmi(bridge); 328 329 if (!encoder_hdmi->cec_notifier) 330 return; 331 332 if (status == connector_status_connected) { 333 const struct drm_edid *drm_edid; 334 const struct edid *edid; 335 336 drm_edid = drm_bridge_edid_read(encoder_hdmi->next_bridge, 337 encoder_hdmi->connector); 338 if (!drm_edid) 339 return; 340 341 /* 342 * FIXME: The CEC physical address should be set using 343 * cec_notifier_set_phys_addr(encoder_hdmi->cec_notifier, 344 * connector->display_info.source_physical_address) from a path 345 * that has read the EDID and called 346 * drm_edid_connector_update(). 347 */ 348 edid = drm_edid_raw(drm_edid); 349 350 cec_notifier_set_phys_addr_from_edid(encoder_hdmi->cec_notifier, edid); 351 352 drm_edid_free(drm_edid); 353 } else 354 cec_notifier_phys_addr_invalidate(encoder_hdmi->cec_notifier); 355 } 356 357 static const struct drm_bridge_funcs meson_encoder_hdmi_bridge_funcs = { 358 .attach = meson_encoder_hdmi_attach, 359 .detach = meson_encoder_hdmi_detach, 360 .mode_valid = meson_encoder_hdmi_mode_valid, 361 .hpd_notify = meson_encoder_hdmi_hpd_notify, 362 .atomic_enable = meson_encoder_hdmi_atomic_enable, 363 .atomic_disable = meson_encoder_hdmi_atomic_disable, 364 .atomic_get_input_bus_fmts = meson_encoder_hdmi_get_inp_bus_fmts, 365 .atomic_check = meson_encoder_hdmi_atomic_check, 366 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, 367 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, 368 .atomic_reset = drm_atomic_helper_bridge_reset, 369 }; 370 371 int meson_encoder_hdmi_probe(struct meson_drm *priv) 372 { 373 struct meson_encoder_hdmi *meson_encoder_hdmi; 374 struct platform_device *pdev; 375 struct device_node *remote; 376 int ret; 377 378 meson_encoder_hdmi = devm_kzalloc(priv->dev, sizeof(*meson_encoder_hdmi), GFP_KERNEL); 379 if (!meson_encoder_hdmi) 380 return -ENOMEM; 381 382 /* HDMI Transceiver Bridge */ 383 remote = of_graph_get_remote_node(priv->dev->of_node, 1, 0); 384 if (!remote) { 385 dev_err(priv->dev, "HDMI transceiver device is disabled"); 386 return 0; 387 } 388 389 meson_encoder_hdmi->next_bridge = of_drm_find_bridge(remote); 390 if (!meson_encoder_hdmi->next_bridge) { 391 ret = dev_err_probe(priv->dev, -EPROBE_DEFER, 392 "Failed to find HDMI transceiver bridge\n"); 393 goto err_put_node; 394 } 395 396 /* HDMI Encoder Bridge */ 397 meson_encoder_hdmi->bridge.funcs = &meson_encoder_hdmi_bridge_funcs; 398 meson_encoder_hdmi->bridge.of_node = priv->dev->of_node; 399 meson_encoder_hdmi->bridge.type = DRM_MODE_CONNECTOR_HDMIA; 400 meson_encoder_hdmi->bridge.interlace_allowed = true; 401 402 drm_bridge_add(&meson_encoder_hdmi->bridge); 403 404 meson_encoder_hdmi->priv = priv; 405 406 /* Encoder */ 407 ret = drm_simple_encoder_init(priv->drm, &meson_encoder_hdmi->encoder, 408 DRM_MODE_ENCODER_TMDS); 409 if (ret) { 410 dev_err_probe(priv->dev, ret, "Failed to init HDMI encoder\n"); 411 goto err_put_node; 412 } 413 414 meson_encoder_hdmi->encoder.possible_crtcs = BIT(0); 415 416 /* Attach HDMI Encoder Bridge to Encoder */ 417 ret = drm_bridge_attach(&meson_encoder_hdmi->encoder, &meson_encoder_hdmi->bridge, NULL, 418 DRM_BRIDGE_ATTACH_NO_CONNECTOR); 419 if (ret) { 420 dev_err_probe(priv->dev, ret, "Failed to attach bridge\n"); 421 goto err_put_node; 422 } 423 424 /* Initialize & attach Bridge Connector */ 425 meson_encoder_hdmi->connector = drm_bridge_connector_init(priv->drm, 426 &meson_encoder_hdmi->encoder); 427 if (IS_ERR(meson_encoder_hdmi->connector)) { 428 ret = dev_err_probe(priv->dev, 429 PTR_ERR(meson_encoder_hdmi->connector), 430 "Unable to create HDMI bridge connector\n"); 431 goto err_put_node; 432 } 433 drm_connector_attach_encoder(meson_encoder_hdmi->connector, 434 &meson_encoder_hdmi->encoder); 435 436 /* 437 * We should have now in place: 438 * encoder->[hdmi encoder bridge]->[dw-hdmi bridge]->[display connector bridge]->[display connector] 439 */ 440 441 /* 442 * drm_connector_attach_max_bpc_property() requires the 443 * connector to have a state. 444 */ 445 drm_atomic_helper_connector_reset(meson_encoder_hdmi->connector); 446 447 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL) || 448 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) || 449 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) 450 drm_connector_attach_hdr_output_metadata_property(meson_encoder_hdmi->connector); 451 452 drm_connector_attach_max_bpc_property(meson_encoder_hdmi->connector, 8, 8); 453 454 /* Handle this here until handled by drm_bridge_connector_init() */ 455 meson_encoder_hdmi->connector->ycbcr_420_allowed = true; 456 457 pdev = of_find_device_by_node(remote); 458 of_node_put(remote); 459 if (pdev) { 460 struct cec_connector_info conn_info; 461 struct cec_notifier *notifier; 462 463 cec_fill_conn_info_from_drm(&conn_info, meson_encoder_hdmi->connector); 464 465 notifier = cec_notifier_conn_register(&pdev->dev, NULL, &conn_info); 466 if (!notifier) { 467 put_device(&pdev->dev); 468 return -ENOMEM; 469 } 470 471 meson_encoder_hdmi->cec_notifier = notifier; 472 } 473 474 priv->encoders[MESON_ENC_HDMI] = meson_encoder_hdmi; 475 476 dev_dbg(priv->dev, "HDMI encoder initialized\n"); 477 478 return 0; 479 480 err_put_node: 481 of_node_put(remote); 482 return ret; 483 } 484 485 void meson_encoder_hdmi_remove(struct meson_drm *priv) 486 { 487 struct meson_encoder_hdmi *meson_encoder_hdmi; 488 489 if (priv->encoders[MESON_ENC_HDMI]) { 490 meson_encoder_hdmi = priv->encoders[MESON_ENC_HDMI]; 491 drm_bridge_remove(&meson_encoder_hdmi->bridge); 492 } 493 } 494