1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * Copyright (C) 2016 BayLibre, SAS 4 * Author: Neil Armstrong <narmstrong@baylibre.com> 5 * Copyright (C) 2015 Amlogic, Inc. All rights reserved. 6 * Copyright (C) 2014 Endless Mobile 7 * 8 * Written by: 9 * Jasper St. Pierre <jstpierre@mecheye.net> 10 */ 11 12 #include <linux/export.h> 13 #include <linux/of_graph.h> 14 15 #include <drm/drm_atomic_helper.h> 16 #include <drm/drm_bridge.h> 17 #include <drm/drm_bridge_connector.h> 18 #include <drm/drm_device.h> 19 #include <drm/drm_edid.h> 20 #include <drm/drm_probe_helper.h> 21 #include <drm/drm_simple_kms_helper.h> 22 23 #include "meson_registers.h" 24 #include "meson_vclk.h" 25 #include "meson_encoder_cvbs.h" 26 27 /* HHI VDAC Registers */ 28 #define HHI_VDAC_CNTL0 0x2F4 /* 0xbd offset in data sheet */ 29 #define HHI_VDAC_CNTL0_G12A 0x2EC /* 0xbd offset in data sheet */ 30 #define HHI_VDAC_CNTL1 0x2F8 /* 0xbe offset in data sheet */ 31 #define HHI_VDAC_CNTL1_G12A 0x2F0 /* 0xbe offset in data sheet */ 32 33 struct meson_encoder_cvbs { 34 struct drm_encoder encoder; 35 struct drm_bridge bridge; 36 struct drm_bridge *next_bridge; 37 struct meson_drm *priv; 38 }; 39 40 #define bridge_to_meson_encoder_cvbs(x) \ 41 container_of(x, struct meson_encoder_cvbs, bridge) 42 43 /* Supported Modes */ 44 45 struct meson_cvbs_mode meson_cvbs_modes[MESON_CVBS_MODES_COUNT] = { 46 { /* PAL */ 47 .enci = &meson_cvbs_enci_pal, 48 .mode = { 49 DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 50 720, 732, 795, 864, 0, 576, 580, 586, 625, 0, 51 DRM_MODE_FLAG_INTERLACE), 52 .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, 53 }, 54 }, 55 { /* NTSC */ 56 .enci = &meson_cvbs_enci_ntsc, 57 .mode = { 58 DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 59 720, 739, 801, 858, 0, 480, 488, 494, 525, 0, 60 DRM_MODE_FLAG_INTERLACE), 61 .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, 62 }, 63 }, 64 }; 65 66 static const struct meson_cvbs_mode * 67 meson_cvbs_get_mode(const struct drm_display_mode *req_mode) 68 { 69 int i; 70 71 for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) { 72 struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i]; 73 74 if (drm_mode_match(req_mode, &meson_mode->mode, 75 DRM_MODE_MATCH_TIMINGS | 76 DRM_MODE_MATCH_CLOCK | 77 DRM_MODE_MATCH_FLAGS | 78 DRM_MODE_MATCH_3D_FLAGS)) 79 return meson_mode; 80 } 81 82 return NULL; 83 } 84 85 static int meson_encoder_cvbs_attach(struct drm_bridge *bridge, 86 struct drm_encoder *encoder, 87 enum drm_bridge_attach_flags flags) 88 { 89 struct meson_encoder_cvbs *meson_encoder_cvbs = 90 bridge_to_meson_encoder_cvbs(bridge); 91 92 return drm_bridge_attach(encoder, meson_encoder_cvbs->next_bridge, 93 &meson_encoder_cvbs->bridge, flags); 94 } 95 96 static int meson_encoder_cvbs_get_modes(struct drm_bridge *bridge, 97 struct drm_connector *connector) 98 { 99 struct meson_encoder_cvbs *meson_encoder_cvbs = 100 bridge_to_meson_encoder_cvbs(bridge); 101 struct meson_drm *priv = meson_encoder_cvbs->priv; 102 struct drm_display_mode *mode; 103 int i; 104 105 for (i = 0; i < MESON_CVBS_MODES_COUNT; ++i) { 106 struct meson_cvbs_mode *meson_mode = &meson_cvbs_modes[i]; 107 108 mode = drm_mode_duplicate(priv->drm, &meson_mode->mode); 109 if (!mode) { 110 dev_err(priv->dev, "Failed to create a new display mode\n"); 111 return 0; 112 } 113 114 drm_mode_probed_add(connector, mode); 115 } 116 117 return i; 118 } 119 120 static enum drm_mode_status 121 meson_encoder_cvbs_mode_valid(struct drm_bridge *bridge, 122 const struct drm_display_info *display_info, 123 const struct drm_display_mode *mode) 124 { 125 if (meson_cvbs_get_mode(mode)) 126 return MODE_OK; 127 128 return MODE_BAD; 129 } 130 131 static int meson_encoder_cvbs_atomic_check(struct drm_bridge *bridge, 132 struct drm_bridge_state *bridge_state, 133 struct drm_crtc_state *crtc_state, 134 struct drm_connector_state *conn_state) 135 { 136 if (meson_cvbs_get_mode(&crtc_state->mode)) 137 return 0; 138 139 return -EINVAL; 140 } 141 142 static void meson_encoder_cvbs_atomic_enable(struct drm_bridge *bridge, 143 struct drm_atomic_state *state) 144 { 145 struct meson_encoder_cvbs *encoder_cvbs = bridge_to_meson_encoder_cvbs(bridge); 146 struct meson_drm *priv = encoder_cvbs->priv; 147 const struct meson_cvbs_mode *meson_mode; 148 struct drm_connector_state *conn_state; 149 struct drm_crtc_state *crtc_state; 150 struct drm_connector *connector; 151 152 connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder); 153 if (WARN_ON(!connector)) 154 return; 155 156 conn_state = drm_atomic_get_new_connector_state(state, connector); 157 if (WARN_ON(!conn_state)) 158 return; 159 160 crtc_state = drm_atomic_get_new_crtc_state(state, conn_state->crtc); 161 if (WARN_ON(!crtc_state)) 162 return; 163 164 meson_mode = meson_cvbs_get_mode(&crtc_state->adjusted_mode); 165 if (WARN_ON(!meson_mode)) 166 return; 167 168 meson_venci_cvbs_mode_set(priv, meson_mode->enci); 169 170 /* Setup 27MHz vclk2 for ENCI and VDAC */ 171 meson_vclk_setup(priv, MESON_VCLK_TARGET_CVBS, 172 MESON_VCLK_CVBS, MESON_VCLK_CVBS, 173 MESON_VCLK_CVBS, MESON_VCLK_CVBS, 174 true); 175 176 /* VDAC0 source is not from ATV */ 177 writel_bits_relaxed(VENC_VDAC_SEL_ATV_DMD, 0, 178 priv->io_base + _REG(VENC_VDAC_DACSEL0)); 179 180 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXBB)) { 181 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 1); 182 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0); 183 } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXM) || 184 meson_vpu_is_compatible(priv, VPU_COMPATIBLE_GXL)) { 185 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0xf0001); 186 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 0); 187 } else if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { 188 regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0x906001); 189 regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 0); 190 } 191 } 192 193 static void meson_encoder_cvbs_atomic_disable(struct drm_bridge *bridge, 194 struct drm_atomic_state *state) 195 { 196 struct meson_encoder_cvbs *meson_encoder_cvbs = 197 bridge_to_meson_encoder_cvbs(bridge); 198 struct meson_drm *priv = meson_encoder_cvbs->priv; 199 200 /* Disable CVBS VDAC */ 201 if (meson_vpu_is_compatible(priv, VPU_COMPATIBLE_G12A)) { 202 regmap_write(priv->hhi, HHI_VDAC_CNTL0_G12A, 0); 203 regmap_write(priv->hhi, HHI_VDAC_CNTL1_G12A, 0); 204 } else { 205 regmap_write(priv->hhi, HHI_VDAC_CNTL0, 0); 206 regmap_write(priv->hhi, HHI_VDAC_CNTL1, 8); 207 } 208 } 209 210 static const struct drm_bridge_funcs meson_encoder_cvbs_bridge_funcs = { 211 .attach = meson_encoder_cvbs_attach, 212 .mode_valid = meson_encoder_cvbs_mode_valid, 213 .get_modes = meson_encoder_cvbs_get_modes, 214 .atomic_enable = meson_encoder_cvbs_atomic_enable, 215 .atomic_disable = meson_encoder_cvbs_atomic_disable, 216 .atomic_check = meson_encoder_cvbs_atomic_check, 217 .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state, 218 .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state, 219 .atomic_reset = drm_atomic_helper_bridge_reset, 220 }; 221 222 int meson_encoder_cvbs_probe(struct meson_drm *priv) 223 { 224 struct drm_device *drm = priv->drm; 225 struct meson_encoder_cvbs *meson_encoder_cvbs; 226 struct drm_connector *connector; 227 struct device_node *remote; 228 int ret; 229 230 meson_encoder_cvbs = devm_drm_bridge_alloc(priv->dev, 231 struct meson_encoder_cvbs, 232 bridge, 233 &meson_encoder_cvbs_bridge_funcs); 234 if (IS_ERR(meson_encoder_cvbs)) 235 return PTR_ERR(meson_encoder_cvbs); 236 237 /* CVBS Connector Bridge */ 238 remote = of_graph_get_remote_node(priv->dev->of_node, 0, 0); 239 if (!remote) { 240 dev_info(drm->dev, "CVBS Output connector not available\n"); 241 return 0; 242 } 243 244 meson_encoder_cvbs->next_bridge = of_drm_find_bridge(remote); 245 of_node_put(remote); 246 if (!meson_encoder_cvbs->next_bridge) 247 return dev_err_probe(priv->dev, -EPROBE_DEFER, 248 "Failed to find CVBS Connector bridge\n"); 249 250 /* CVBS Encoder Bridge */ 251 meson_encoder_cvbs->bridge.of_node = priv->dev->of_node; 252 meson_encoder_cvbs->bridge.type = DRM_MODE_CONNECTOR_Composite; 253 meson_encoder_cvbs->bridge.ops = DRM_BRIDGE_OP_MODES; 254 meson_encoder_cvbs->bridge.interlace_allowed = true; 255 256 drm_bridge_add(&meson_encoder_cvbs->bridge); 257 258 meson_encoder_cvbs->priv = priv; 259 260 /* Encoder */ 261 ret = drm_simple_encoder_init(priv->drm, &meson_encoder_cvbs->encoder, 262 DRM_MODE_ENCODER_TVDAC); 263 if (ret) 264 return dev_err_probe(priv->dev, ret, 265 "Failed to init CVBS encoder\n"); 266 267 meson_encoder_cvbs->encoder.possible_crtcs = BIT(0); 268 269 /* Attach CVBS Encoder Bridge to Encoder */ 270 ret = drm_bridge_attach(&meson_encoder_cvbs->encoder, &meson_encoder_cvbs->bridge, NULL, 271 DRM_BRIDGE_ATTACH_NO_CONNECTOR); 272 if (ret) { 273 dev_err(priv->dev, "Failed to attach bridge: %d\n", ret); 274 return ret; 275 } 276 277 /* Initialize & attach Bridge Connector */ 278 connector = drm_bridge_connector_init(priv->drm, &meson_encoder_cvbs->encoder); 279 if (IS_ERR(connector)) 280 return dev_err_probe(priv->dev, PTR_ERR(connector), 281 "Unable to create CVBS bridge connector\n"); 282 283 drm_connector_attach_encoder(connector, &meson_encoder_cvbs->encoder); 284 285 priv->encoders[MESON_ENC_CVBS] = meson_encoder_cvbs; 286 287 return 0; 288 } 289 290 void meson_encoder_cvbs_remove(struct meson_drm *priv) 291 { 292 struct meson_encoder_cvbs *meson_encoder_cvbs; 293 294 if (priv->encoders[MESON_ENC_CVBS]) { 295 meson_encoder_cvbs = priv->encoders[MESON_ENC_CVBS]; 296 drm_bridge_remove(&meson_encoder_cvbs->bridge); 297 } 298 } 299