1*1ccea77eSThomas Gleixner /* SPDX-License-Identifier: GPL-2.0-or-later */ 2bbbe775eSNeil Armstrong /* 3bbbe775eSNeil Armstrong * Copyright (C) 2016 BayLibre, SAS 4bbbe775eSNeil Armstrong * Author: Neil Armstrong <narmstrong@baylibre.com> 5bbbe775eSNeil Armstrong */ 6bbbe775eSNeil Armstrong 7bbbe775eSNeil Armstrong #ifndef __MESON_DRV_H 8bbbe775eSNeil Armstrong #define __MESON_DRV_H 9bbbe775eSNeil Armstrong 10bbbe775eSNeil Armstrong #include <linux/platform_device.h> 11bbbe775eSNeil Armstrong #include <linux/regmap.h> 12bbbe775eSNeil Armstrong #include <linux/of.h> 1366cae477SMaxime Jourdan #include <linux/soc/amlogic/meson-canvas.h> 14bbbe775eSNeil Armstrong #include <drm/drmP.h> 15bbbe775eSNeil Armstrong 16bbbe775eSNeil Armstrong struct meson_drm { 17bbbe775eSNeil Armstrong struct device *dev; 18bbbe775eSNeil Armstrong void __iomem *io_base; 19bbbe775eSNeil Armstrong struct regmap *hhi; 20bbbe775eSNeil Armstrong int vsync_irq; 21bbbe775eSNeil Armstrong 2266cae477SMaxime Jourdan struct meson_canvas *canvas; 2366cae477SMaxime Jourdan u8 canvas_id_osd1; 24f9a23481SNeil Armstrong u8 canvas_id_vd1_0; 25f9a23481SNeil Armstrong u8 canvas_id_vd1_1; 26f9a23481SNeil Armstrong u8 canvas_id_vd1_2; 2766cae477SMaxime Jourdan 28bbbe775eSNeil Armstrong struct drm_device *drm; 29bbbe775eSNeil Armstrong struct drm_crtc *crtc; 30bbbe775eSNeil Armstrong struct drm_plane *primary_plane; 31f9a23481SNeil Armstrong struct drm_plane *overlay_plane; 32bbbe775eSNeil Armstrong 33bbbe775eSNeil Armstrong /* Components Data */ 34bbbe775eSNeil Armstrong struct { 35bbbe775eSNeil Armstrong bool osd1_enabled; 36bbbe775eSNeil Armstrong bool osd1_interlace; 37bbbe775eSNeil Armstrong bool osd1_commit; 38bbbe775eSNeil Armstrong uint32_t osd1_ctrl_stat; 39bbbe775eSNeil Armstrong uint32_t osd1_blk0_cfg[5]; 40e88230a3SNeil Armstrong uint32_t osd1_addr; 41e88230a3SNeil Armstrong uint32_t osd1_stride; 42e88230a3SNeil Armstrong uint32_t osd1_height; 4320d7fe03SNeil Armstrong uint32_t osd_sc_ctrl0; 4420d7fe03SNeil Armstrong uint32_t osd_sc_i_wh_m1; 4520d7fe03SNeil Armstrong uint32_t osd_sc_o_h_start_end; 4620d7fe03SNeil Armstrong uint32_t osd_sc_o_v_start_end; 4720d7fe03SNeil Armstrong uint32_t osd_sc_v_ini_phase; 4820d7fe03SNeil Armstrong uint32_t osd_sc_v_phase_step; 4920d7fe03SNeil Armstrong uint32_t osd_sc_h_ini_phase; 5020d7fe03SNeil Armstrong uint32_t osd_sc_h_phase_step; 5120d7fe03SNeil Armstrong uint32_t osd_sc_h_ctrl0; 5220d7fe03SNeil Armstrong uint32_t osd_sc_v_ctrl0; 5368679d41SNeil Armstrong uint32_t osd_blend_din0_scope_h; 5468679d41SNeil Armstrong uint32_t osd_blend_din0_scope_v; 5568679d41SNeil Armstrong uint32_t osb_blend0_size; 5668679d41SNeil Armstrong uint32_t osb_blend1_size; 57f9a23481SNeil Armstrong 58f9a23481SNeil Armstrong bool vd1_enabled; 59f9a23481SNeil Armstrong bool vd1_commit; 60f9a23481SNeil Armstrong unsigned int vd1_planes; 61f9a23481SNeil Armstrong uint32_t vd1_if0_gen_reg; 62f9a23481SNeil Armstrong uint32_t vd1_if0_luma_x0; 63f9a23481SNeil Armstrong uint32_t vd1_if0_luma_y0; 64f9a23481SNeil Armstrong uint32_t vd1_if0_chroma_x0; 65f9a23481SNeil Armstrong uint32_t vd1_if0_chroma_y0; 66f9a23481SNeil Armstrong uint32_t vd1_if0_repeat_loop; 67f9a23481SNeil Armstrong uint32_t vd1_if0_luma0_rpt_pat; 68f9a23481SNeil Armstrong uint32_t vd1_if0_chroma0_rpt_pat; 69f9a23481SNeil Armstrong uint32_t vd1_range_map_y; 70f9a23481SNeil Armstrong uint32_t vd1_range_map_cb; 71f9a23481SNeil Armstrong uint32_t vd1_range_map_cr; 72f9a23481SNeil Armstrong uint32_t viu_vd1_fmt_w; 73f9a23481SNeil Armstrong uint32_t vd1_if0_canvas0; 74f9a23481SNeil Armstrong uint32_t vd1_if0_gen_reg2; 75f9a23481SNeil Armstrong uint32_t viu_vd1_fmt_ctrl; 76f9a23481SNeil Armstrong uint32_t vd1_addr0; 77f9a23481SNeil Armstrong uint32_t vd1_addr1; 78f9a23481SNeil Armstrong uint32_t vd1_addr2; 79f9a23481SNeil Armstrong uint32_t vd1_stride0; 80f9a23481SNeil Armstrong uint32_t vd1_stride1; 81f9a23481SNeil Armstrong uint32_t vd1_stride2; 82f9a23481SNeil Armstrong uint32_t vd1_height0; 83f9a23481SNeil Armstrong uint32_t vd1_height1; 84f9a23481SNeil Armstrong uint32_t vd1_height2; 85f9a23481SNeil Armstrong uint32_t vpp_pic_in_height; 86f9a23481SNeil Armstrong uint32_t vpp_postblend_vd1_h_start_end; 87f9a23481SNeil Armstrong uint32_t vpp_postblend_vd1_v_start_end; 88f9a23481SNeil Armstrong uint32_t vpp_hsc_region12_startp; 89f9a23481SNeil Armstrong uint32_t vpp_hsc_region34_startp; 90f9a23481SNeil Armstrong uint32_t vpp_hsc_region4_endp; 91f9a23481SNeil Armstrong uint32_t vpp_hsc_start_phase_step; 92f9a23481SNeil Armstrong uint32_t vpp_hsc_region1_phase_slope; 93f9a23481SNeil Armstrong uint32_t vpp_hsc_region3_phase_slope; 94f9a23481SNeil Armstrong uint32_t vpp_line_in_length; 95f9a23481SNeil Armstrong uint32_t vpp_preblend_h_size; 96f9a23481SNeil Armstrong uint32_t vpp_vsc_region12_startp; 97f9a23481SNeil Armstrong uint32_t vpp_vsc_region34_startp; 98f9a23481SNeil Armstrong uint32_t vpp_vsc_region4_endp; 99f9a23481SNeil Armstrong uint32_t vpp_vsc_start_phase_step; 100f9a23481SNeil Armstrong uint32_t vpp_vsc_ini_phase; 101f9a23481SNeil Armstrong uint32_t vpp_vsc_phase_ctrl; 102f9a23481SNeil Armstrong uint32_t vpp_hsc_phase_ctrl; 103f9a23481SNeil Armstrong uint32_t vpp_blend_vd2_h_start_end; 104f9a23481SNeil Armstrong uint32_t vpp_blend_vd2_v_start_end; 105bbbe775eSNeil Armstrong } viu; 106bbbe775eSNeil Armstrong 107bbbe775eSNeil Armstrong struct { 108bbbe775eSNeil Armstrong unsigned int current_mode; 1093f68be7dSNeil Armstrong bool hdmi_repeat; 1103f68be7dSNeil Armstrong bool venc_repeat; 1113f68be7dSNeil Armstrong bool hdmi_use_enci; 112bbbe775eSNeil Armstrong } venc; 113bbbe775eSNeil Armstrong }; 114bbbe775eSNeil Armstrong 115bbbe775eSNeil Armstrong static inline int meson_vpu_is_compatible(struct meson_drm *priv, 116bbbe775eSNeil Armstrong const char *compat) 117bbbe775eSNeil Armstrong { 118bbbe775eSNeil Armstrong return of_device_is_compatible(priv->dev->of_node, compat); 119bbbe775eSNeil Armstrong } 120bbbe775eSNeil Armstrong 121bbbe775eSNeil Armstrong #endif /* __MESON_DRV_H */ 122