xref: /linux/drivers/gpu/drm/mediatek/mtk_crtc.h (revision db5d28c0bfe566908719bec8e25443aabecbb802)
1f5214df8SHsiao Chien Sung /* SPDX-License-Identifier: GPL-2.0-only */
2f5214df8SHsiao Chien Sung /*
3f5214df8SHsiao Chien Sung  * Copyright (c) 2015 MediaTek Inc.
4f5214df8SHsiao Chien Sung  */
5f5214df8SHsiao Chien Sung 
6f5214df8SHsiao Chien Sung #ifndef MTK_CRTC_H
7f5214df8SHsiao Chien Sung #define MTK_CRTC_H
8f5214df8SHsiao Chien Sung 
9f5214df8SHsiao Chien Sung #include <drm/drm_crtc.h>
107026ee0bSHsiao Chien Sung #include "mtk_ddp_comp.h"
11f5214df8SHsiao Chien Sung #include "mtk_drm_drv.h"
12*9f2997abSHsiao Chien Sung #include "mtk_plane.h"
13f5214df8SHsiao Chien Sung 
14f5214df8SHsiao Chien Sung #define MTK_MAX_BPC	10
15f5214df8SHsiao Chien Sung #define MTK_MIN_BPC	3
16f5214df8SHsiao Chien Sung 
17f5214df8SHsiao Chien Sung void mtk_crtc_commit(struct drm_crtc *crtc);
18f5214df8SHsiao Chien Sung int mtk_crtc_create(struct drm_device *drm_dev, const unsigned int *path,
19f5214df8SHsiao Chien Sung 		    unsigned int path_len, int priv_data_index,
20f5214df8SHsiao Chien Sung 		    const struct mtk_drm_route *conn_routes,
21f5214df8SHsiao Chien Sung 		    unsigned int num_conn_routes);
22f5214df8SHsiao Chien Sung int mtk_crtc_plane_check(struct drm_crtc *crtc, struct drm_plane *plane,
23f5214df8SHsiao Chien Sung 			 struct mtk_plane_state *state);
24f5214df8SHsiao Chien Sung void mtk_crtc_async_update(struct drm_crtc *crtc, struct drm_plane *plane,
25f5214df8SHsiao Chien Sung 			   struct drm_atomic_state *plane_state);
26f5214df8SHsiao Chien Sung struct device *mtk_crtc_dma_dev_get(struct drm_crtc *crtc);
27f5214df8SHsiao Chien Sung 
28f5214df8SHsiao Chien Sung #endif /* MTK_CRTC_H */
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