xref: /linux/drivers/gpu/drm/lima/lima_dlbu.c (revision 6fdcba32711044c35c0e1b094cbd8f3f0b4472c9)
1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /* Copyright 2018-2019 Qiang Yu <yuq825@gmail.com> */
3 
4 #include <linux/io.h>
5 #include <linux/device.h>
6 
7 #include "lima_device.h"
8 #include "lima_dlbu.h"
9 #include "lima_vm.h"
10 #include "lima_regs.h"
11 
12 #define dlbu_write(reg, data) writel(data, ip->iomem + reg)
13 #define dlbu_read(reg) readl(ip->iomem + reg)
14 
15 void lima_dlbu_enable(struct lima_device *dev, int num_pp)
16 {
17 	struct lima_sched_pipe *pipe = dev->pipe + lima_pipe_pp;
18 	struct lima_ip *ip = dev->ip + lima_ip_dlbu;
19 	int i, mask = 0;
20 
21 	for (i = 0; i < num_pp; i++) {
22 		struct lima_ip *pp = pipe->processor[i];
23 
24 		mask |= 1 << (pp->id - lima_ip_pp0);
25 	}
26 
27 	dlbu_write(LIMA_DLBU_PP_ENABLE_MASK, mask);
28 }
29 
30 void lima_dlbu_disable(struct lima_device *dev)
31 {
32 	struct lima_ip *ip = dev->ip + lima_ip_dlbu;
33 
34 	dlbu_write(LIMA_DLBU_PP_ENABLE_MASK, 0);
35 }
36 
37 void lima_dlbu_set_reg(struct lima_ip *ip, u32 *reg)
38 {
39 	dlbu_write(LIMA_DLBU_TLLIST_VBASEADDR, reg[0]);
40 	dlbu_write(LIMA_DLBU_FB_DIM, reg[1]);
41 	dlbu_write(LIMA_DLBU_TLLIST_CONF, reg[2]);
42 	dlbu_write(LIMA_DLBU_START_TILE_POS, reg[3]);
43 }
44 
45 int lima_dlbu_init(struct lima_ip *ip)
46 {
47 	struct lima_device *dev = ip->dev;
48 
49 	dlbu_write(LIMA_DLBU_MASTER_TLLIST_PHYS_ADDR, dev->dlbu_dma | 1);
50 	dlbu_write(LIMA_DLBU_MASTER_TLLIST_VADDR, LIMA_VA_RESERVE_DLBU);
51 
52 	return 0;
53 }
54 
55 void lima_dlbu_fini(struct lima_ip *ip)
56 {
57 
58 }
59