xref: /linux/drivers/gpu/drm/kmb/kmb_drv.h (revision 9052e9c95d908d6c3d7570aadc8898e1d871c8bb)
1 /* SPDX-License-Identifier: GPL-2.0-only
2  *
3  * Copyright © 2018-2020 Intel Corporation
4  */
5 
6 #ifndef __KMB_DRV_H__
7 #define __KMB_DRV_H__
8 
9 #include <drm/drm_device.h>
10 
11 #include "kmb_plane.h"
12 #include "kmb_regs.h"
13 
14 #define KMB_MAX_WIDTH			1920 /*Max width in pixels */
15 #define KMB_MAX_HEIGHT			1080 /*Max height in pixels */
16 #define KMB_MIN_WIDTH                   1920 /*Max width in pixels */
17 #define KMB_MIN_HEIGHT                  1080 /*Max height in pixels */
18 
19 #define DRIVER_DATE			"20210223"
20 #define DRIVER_MAJOR			1
21 #define DRIVER_MINOR			1
22 
23 #define KMB_LCD_DEFAULT_CLK		200000000
24 #define KMB_SYS_CLK_MHZ			500
25 
26 #define ICAM_MMIO		0x3b100000
27 #define ICAM_LCD_OFFSET		0x1080
28 #define ICAM_MMIO_SIZE		0x2000
29 
30 struct kmb_dsi;
31 
32 struct kmb_clock {
33 	struct clk *clk_lcd;
34 	struct clk *clk_pll0;
35 };
36 
37 struct kmb_drm_private {
38 	struct drm_device		drm;
39 	struct kmb_dsi			*kmb_dsi;
40 	void __iomem			*lcd_mmio;
41 	struct kmb_clock		kmb_clk;
42 	struct drm_crtc			crtc;
43 	struct kmb_plane		*plane;
44 	struct drm_atomic_state		*state;
45 	spinlock_t			irq_lock;
46 	int				irq_lcd;
47 	int				sys_clk_mhz;
48 	struct layer_status		plane_status[KMB_MAX_PLANES];
49 	int				kmb_under_flow;
50 	int				kmb_flush_done;
51 	int				layer_no;
52 };
53 
54 static inline struct kmb_drm_private *to_kmb(const struct drm_device *dev)
55 {
56 	return container_of(dev, struct kmb_drm_private, drm);
57 }
58 
59 static inline struct kmb_drm_private *crtc_to_kmb_priv(const struct drm_crtc *x)
60 {
61 	return container_of(x, struct kmb_drm_private, crtc);
62 }
63 
64 static inline void kmb_write_lcd(struct kmb_drm_private *dev_p,
65 				 unsigned int reg, u32 value)
66 {
67 	writel(value, (dev_p->lcd_mmio + reg));
68 }
69 
70 static inline u32 kmb_read_lcd(struct kmb_drm_private *dev_p, unsigned int reg)
71 {
72 	return readl(dev_p->lcd_mmio + reg);
73 }
74 
75 static inline void kmb_set_bitmask_lcd(struct kmb_drm_private *dev_p,
76 				       unsigned int reg, u32 mask)
77 {
78 	u32 reg_val = kmb_read_lcd(dev_p, reg);
79 
80 	kmb_write_lcd(dev_p, reg, (reg_val | mask));
81 }
82 
83 static inline void kmb_clr_bitmask_lcd(struct kmb_drm_private *dev_p,
84 				       unsigned int reg, u32 mask)
85 {
86 	u32 reg_val = kmb_read_lcd(dev_p, reg);
87 
88 	kmb_write_lcd(dev_p, reg, (reg_val & (~mask)));
89 }
90 
91 int kmb_setup_crtc(struct drm_device *dev);
92 void kmb_set_scanout(struct kmb_drm_private *lcd);
93 #endif /* __KMB_DRV_H__ */
94