xref: /linux/drivers/gpu/drm/kmb/kmb_drv.h (revision 26fbb4c8c7c3ee9a4c3b4de555a8587b5a19154e)
1 /* SPDX-License-Identifier: GPL-2.0-only
2  *
3  * Copyright © 2018-2020 Intel Corporation
4  */
5 
6 #ifndef __KMB_DRV_H__
7 #define __KMB_DRV_H__
8 
9 #include <drm/drm_device.h>
10 
11 #include "kmb_plane.h"
12 #include "kmb_regs.h"
13 
14 #define KMB_MAX_WIDTH			1920 /*Max width in pixels */
15 #define KMB_MAX_HEIGHT			1080 /*Max height in pixels */
16 #define KMB_MIN_WIDTH                   1920 /*Max width in pixels */
17 #define KMB_MIN_HEIGHT                  1080 /*Max height in pixels */
18 #define KMB_LCD_DEFAULT_CLK		200000000
19 #define KMB_SYS_CLK_MHZ			500
20 
21 #define ICAM_MMIO		0x3b100000
22 #define ICAM_LCD_OFFSET		0x1080
23 #define ICAM_MMIO_SIZE		0x2000
24 
25 struct kmb_dsi;
26 
27 struct kmb_clock {
28 	struct clk *clk_lcd;
29 	struct clk *clk_pll0;
30 };
31 
32 struct kmb_drm_private {
33 	struct drm_device		drm;
34 	struct kmb_dsi			*kmb_dsi;
35 	void __iomem			*lcd_mmio;
36 	struct kmb_clock		kmb_clk;
37 	struct drm_crtc			crtc;
38 	struct kmb_plane		*plane;
39 	struct drm_atomic_state		*state;
40 	spinlock_t			irq_lock;
41 	int				irq_lcd;
42 	int				sys_clk_mhz;
43 	struct layer_status		plane_status[KMB_MAX_PLANES];
44 	int				kmb_under_flow;
45 	int				kmb_flush_done;
46 	int				layer_no;
47 };
48 
49 static inline struct kmb_drm_private *to_kmb(const struct drm_device *dev)
50 {
51 	return container_of(dev, struct kmb_drm_private, drm);
52 }
53 
54 static inline struct kmb_drm_private *crtc_to_kmb_priv(const struct drm_crtc *x)
55 {
56 	return container_of(x, struct kmb_drm_private, crtc);
57 }
58 
59 static inline void kmb_write_lcd(struct kmb_drm_private *dev_p,
60 				 unsigned int reg, u32 value)
61 {
62 	writel(value, (dev_p->lcd_mmio + reg));
63 }
64 
65 static inline u32 kmb_read_lcd(struct kmb_drm_private *dev_p, unsigned int reg)
66 {
67 	return readl(dev_p->lcd_mmio + reg);
68 }
69 
70 static inline void kmb_set_bitmask_lcd(struct kmb_drm_private *dev_p,
71 				       unsigned int reg, u32 mask)
72 {
73 	u32 reg_val = kmb_read_lcd(dev_p, reg);
74 
75 	kmb_write_lcd(dev_p, reg, (reg_val | mask));
76 }
77 
78 static inline void kmb_clr_bitmask_lcd(struct kmb_drm_private *dev_p,
79 				       unsigned int reg, u32 mask)
80 {
81 	u32 reg_val = kmb_read_lcd(dev_p, reg);
82 
83 	kmb_write_lcd(dev_p, reg, (reg_val & (~mask)));
84 }
85 
86 int kmb_setup_crtc(struct drm_device *dev);
87 void kmb_set_scanout(struct kmb_drm_private *lcd);
88 #endif /* __KMB_DRV_H__ */
89