xref: /linux/drivers/gpu/drm/imx/ipuv3/ipuv3-plane.h (revision 9a87ffc99ec8eb8d35eed7c4f816d75f5cc9662e)
1*4b6cb2b6SLucas Stach /* SPDX-License-Identifier: GPL-2.0 */
2*4b6cb2b6SLucas Stach #ifndef __IPUV3_PLANE_H__
3*4b6cb2b6SLucas Stach #define __IPUV3_PLANE_H__
4*4b6cb2b6SLucas Stach 
5*4b6cb2b6SLucas Stach #include <drm/drm_crtc.h> /* drm_plane */
6*4b6cb2b6SLucas Stach 
7*4b6cb2b6SLucas Stach struct drm_plane;
8*4b6cb2b6SLucas Stach struct drm_device;
9*4b6cb2b6SLucas Stach struct ipu_soc;
10*4b6cb2b6SLucas Stach struct drm_crtc;
11*4b6cb2b6SLucas Stach struct drm_framebuffer;
12*4b6cb2b6SLucas Stach 
13*4b6cb2b6SLucas Stach struct ipuv3_channel;
14*4b6cb2b6SLucas Stach struct dmfc_channel;
15*4b6cb2b6SLucas Stach struct ipu_dp;
16*4b6cb2b6SLucas Stach 
17*4b6cb2b6SLucas Stach struct ipu_plane {
18*4b6cb2b6SLucas Stach 	struct drm_plane	base;
19*4b6cb2b6SLucas Stach 
20*4b6cb2b6SLucas Stach 	struct ipu_soc		*ipu;
21*4b6cb2b6SLucas Stach 	struct ipuv3_channel	*ipu_ch;
22*4b6cb2b6SLucas Stach 	struct ipuv3_channel	*alpha_ch;
23*4b6cb2b6SLucas Stach 	struct dmfc_channel	*dmfc;
24*4b6cb2b6SLucas Stach 	struct ipu_dp		*dp;
25*4b6cb2b6SLucas Stach 
26*4b6cb2b6SLucas Stach 	int			dma;
27*4b6cb2b6SLucas Stach 	int			dp_flow;
28*4b6cb2b6SLucas Stach 
29*4b6cb2b6SLucas Stach 	bool			disabling;
30*4b6cb2b6SLucas Stach };
31*4b6cb2b6SLucas Stach 
32*4b6cb2b6SLucas Stach struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
33*4b6cb2b6SLucas Stach 				 int dma, int dp, unsigned int possible_crtcs,
34*4b6cb2b6SLucas Stach 				 enum drm_plane_type type);
35*4b6cb2b6SLucas Stach 
36*4b6cb2b6SLucas Stach /* Init IDMAC, DMFC, DP */
37*4b6cb2b6SLucas Stach int ipu_plane_mode_set(struct ipu_plane *plane, struct drm_crtc *crtc,
38*4b6cb2b6SLucas Stach 		       struct drm_display_mode *mode,
39*4b6cb2b6SLucas Stach 		       struct drm_framebuffer *fb, int crtc_x, int crtc_y,
40*4b6cb2b6SLucas Stach 		       unsigned int crtc_w, unsigned int crtc_h,
41*4b6cb2b6SLucas Stach 		       uint32_t src_x, uint32_t src_y, uint32_t src_w,
42*4b6cb2b6SLucas Stach 		       uint32_t src_h, bool interlaced);
43*4b6cb2b6SLucas Stach 
44*4b6cb2b6SLucas Stach int ipu_plane_irq(struct ipu_plane *plane);
45*4b6cb2b6SLucas Stach 
46*4b6cb2b6SLucas Stach void ipu_plane_disable(struct ipu_plane *ipu_plane, bool disable_dp_channel);
47*4b6cb2b6SLucas Stach void ipu_plane_disable_deferred(struct drm_plane *plane);
48*4b6cb2b6SLucas Stach bool ipu_plane_atomic_update_pending(struct drm_plane *plane);
49*4b6cb2b6SLucas Stach 
50*4b6cb2b6SLucas Stach #endif
51