1*0e177d5cSLiu Ying // SPDX-License-Identifier: GPL-2.0+ 2*0e177d5cSLiu Ying /* 3*0e177d5cSLiu Ying * Copyright 2024 NXP 4*0e177d5cSLiu Ying */ 5*0e177d5cSLiu Ying 6*0e177d5cSLiu Ying #include <linux/component.h> 7*0e177d5cSLiu Ying #include <linux/ioport.h> 8*0e177d5cSLiu Ying #include <linux/mod_devicetable.h> 9*0e177d5cSLiu Ying #include <linux/module.h> 10*0e177d5cSLiu Ying #include <linux/platform_device.h> 11*0e177d5cSLiu Ying #include <linux/regmap.h> 12*0e177d5cSLiu Ying 13*0e177d5cSLiu Ying #include <drm/drm_fourcc.h> 14*0e177d5cSLiu Ying 15*0e177d5cSLiu Ying #include "dc-drv.h" 16*0e177d5cSLiu Ying #include "dc-fu.h" 17*0e177d5cSLiu Ying 18*0e177d5cSLiu Ying #define BASEADDRESS(x) (0x10 + FRAC_OFFSET * (x)) 19*0e177d5cSLiu Ying #define SOURCEBUFFERATTRIBUTES(x) (0x14 + FRAC_OFFSET * (x)) 20*0e177d5cSLiu Ying #define SOURCEBUFFERDIMENSION(x) (0x18 + FRAC_OFFSET * (x)) 21*0e177d5cSLiu Ying #define COLORCOMPONENTBITS(x) (0x1c + FRAC_OFFSET * (x)) 22*0e177d5cSLiu Ying #define COLORCOMPONENTSHIFT(x) (0x20 + FRAC_OFFSET * (x)) 23*0e177d5cSLiu Ying #define LAYEROFFSET(x) (0x24 + FRAC_OFFSET * (x)) 24*0e177d5cSLiu Ying #define CLIPWINDOWOFFSET(x) (0x28 + FRAC_OFFSET * (x)) 25*0e177d5cSLiu Ying #define CLIPWINDOWDIMENSIONS(x) (0x2c + FRAC_OFFSET * (x)) 26*0e177d5cSLiu Ying #define CONSTANTCOLOR(x) (0x30 + FRAC_OFFSET * (x)) 27*0e177d5cSLiu Ying #define LAYERPROPERTY(x) (0x34 + FRAC_OFFSET * (x)) 28*0e177d5cSLiu Ying #define FRAMEDIMENSIONS 0x150 29*0e177d5cSLiu Ying 30*0e177d5cSLiu Ying struct dc_fl { 31*0e177d5cSLiu Ying struct dc_fu fu; 32*0e177d5cSLiu Ying }; 33*0e177d5cSLiu Ying 34*0e177d5cSLiu Ying static const struct dc_subdev_info dc_fl_info[] = { 35*0e177d5cSLiu Ying { .reg_start = 0x56180ac0, .id = 0, }, 36*0e177d5cSLiu Ying }; 37*0e177d5cSLiu Ying 38*0e177d5cSLiu Ying static const struct regmap_range dc_fl_regmap_ranges[] = { 39*0e177d5cSLiu Ying regmap_reg_range(STATICCONTROL, FRAMEDIMENSIONS), 40*0e177d5cSLiu Ying }; 41*0e177d5cSLiu Ying 42*0e177d5cSLiu Ying static const struct regmap_access_table dc_fl_regmap_access_table = { 43*0e177d5cSLiu Ying .yes_ranges = dc_fl_regmap_ranges, 44*0e177d5cSLiu Ying .n_yes_ranges = ARRAY_SIZE(dc_fl_regmap_ranges), 45*0e177d5cSLiu Ying }; 46*0e177d5cSLiu Ying 47*0e177d5cSLiu Ying static const struct regmap_config dc_fl_cfg_regmap_config = { 48*0e177d5cSLiu Ying .name = "cfg", 49*0e177d5cSLiu Ying .reg_bits = 32, 50*0e177d5cSLiu Ying .reg_stride = 4, 51*0e177d5cSLiu Ying .val_bits = 32, 52*0e177d5cSLiu Ying .fast_io = true, 53*0e177d5cSLiu Ying .wr_table = &dc_fl_regmap_access_table, 54*0e177d5cSLiu Ying .rd_table = &dc_fl_regmap_access_table, 55*0e177d5cSLiu Ying .max_register = FRAMEDIMENSIONS, 56*0e177d5cSLiu Ying }; 57*0e177d5cSLiu Ying 58*0e177d5cSLiu Ying static void dc_fl_set_fmt(struct dc_fu *fu, enum dc_fu_frac frac, 59*0e177d5cSLiu Ying const struct drm_format_info *format) 60*0e177d5cSLiu Ying { 61*0e177d5cSLiu Ying u32 bits = 0, shifts = 0; 62*0e177d5cSLiu Ying 63*0e177d5cSLiu Ying dc_fu_set_src_bpp(fu, frac, format->cpp[0] * 8); 64*0e177d5cSLiu Ying 65*0e177d5cSLiu Ying regmap_write_bits(fu->reg_cfg, LAYERPROPERTY(frac), 66*0e177d5cSLiu Ying YUVCONVERSIONMODE_MASK, 67*0e177d5cSLiu Ying YUVCONVERSIONMODE(YUVCONVERSIONMODE_OFF)); 68*0e177d5cSLiu Ying 69*0e177d5cSLiu Ying dc_fu_get_pixel_format_bits(fu, format->format, &bits); 70*0e177d5cSLiu Ying dc_fu_get_pixel_format_shifts(fu, format->format, &shifts); 71*0e177d5cSLiu Ying 72*0e177d5cSLiu Ying regmap_write(fu->reg_cfg, COLORCOMPONENTBITS(frac), bits); 73*0e177d5cSLiu Ying regmap_write(fu->reg_cfg, COLORCOMPONENTSHIFT(frac), shifts); 74*0e177d5cSLiu Ying } 75*0e177d5cSLiu Ying 76*0e177d5cSLiu Ying static void dc_fl_set_framedimensions(struct dc_fu *fu, int w, int h) 77*0e177d5cSLiu Ying { 78*0e177d5cSLiu Ying regmap_write(fu->reg_cfg, FRAMEDIMENSIONS, 79*0e177d5cSLiu Ying FRAMEWIDTH(w) | FRAMEHEIGHT(h)); 80*0e177d5cSLiu Ying } 81*0e177d5cSLiu Ying 82*0e177d5cSLiu Ying static void dc_fl_init(struct dc_fu *fu) 83*0e177d5cSLiu Ying { 84*0e177d5cSLiu Ying dc_fu_common_hw_init(fu); 85*0e177d5cSLiu Ying dc_fu_shdldreq_sticky(fu, 0xff); 86*0e177d5cSLiu Ying } 87*0e177d5cSLiu Ying 88*0e177d5cSLiu Ying static void dc_fl_set_ops(struct dc_fu *fu) 89*0e177d5cSLiu Ying { 90*0e177d5cSLiu Ying memcpy(&fu->ops, &dc_fu_common_ops, sizeof(dc_fu_common_ops)); 91*0e177d5cSLiu Ying fu->ops.init = dc_fl_init; 92*0e177d5cSLiu Ying fu->ops.set_fmt = dc_fl_set_fmt; 93*0e177d5cSLiu Ying fu->ops.set_framedimensions = dc_fl_set_framedimensions; 94*0e177d5cSLiu Ying } 95*0e177d5cSLiu Ying 96*0e177d5cSLiu Ying static int dc_fl_bind(struct device *dev, struct device *master, void *data) 97*0e177d5cSLiu Ying { 98*0e177d5cSLiu Ying struct platform_device *pdev = to_platform_device(dev); 99*0e177d5cSLiu Ying struct dc_drm_device *dc_drm = data; 100*0e177d5cSLiu Ying struct resource *res_pec; 101*0e177d5cSLiu Ying void __iomem *base_cfg; 102*0e177d5cSLiu Ying struct dc_fl *fl; 103*0e177d5cSLiu Ying struct dc_fu *fu; 104*0e177d5cSLiu Ying int i, id; 105*0e177d5cSLiu Ying 106*0e177d5cSLiu Ying fl = devm_kzalloc(dev, sizeof(*fl), GFP_KERNEL); 107*0e177d5cSLiu Ying if (!fl) 108*0e177d5cSLiu Ying return -ENOMEM; 109*0e177d5cSLiu Ying 110*0e177d5cSLiu Ying fu = &fl->fu; 111*0e177d5cSLiu Ying 112*0e177d5cSLiu Ying res_pec = platform_get_resource(pdev, IORESOURCE_MEM, 0); 113*0e177d5cSLiu Ying 114*0e177d5cSLiu Ying base_cfg = devm_platform_ioremap_resource_byname(pdev, "cfg"); 115*0e177d5cSLiu Ying if (IS_ERR(base_cfg)) 116*0e177d5cSLiu Ying return PTR_ERR(base_cfg); 117*0e177d5cSLiu Ying 118*0e177d5cSLiu Ying fu->reg_cfg = devm_regmap_init_mmio(dev, base_cfg, 119*0e177d5cSLiu Ying &dc_fl_cfg_regmap_config); 120*0e177d5cSLiu Ying if (IS_ERR(fu->reg_cfg)) 121*0e177d5cSLiu Ying return PTR_ERR(fu->reg_cfg); 122*0e177d5cSLiu Ying 123*0e177d5cSLiu Ying id = dc_subdev_get_id(dc_fl_info, ARRAY_SIZE(dc_fl_info), res_pec); 124*0e177d5cSLiu Ying if (id < 0) { 125*0e177d5cSLiu Ying dev_err(dev, "failed to get instance number: %d\n", id); 126*0e177d5cSLiu Ying return id; 127*0e177d5cSLiu Ying } 128*0e177d5cSLiu Ying 129*0e177d5cSLiu Ying fu->link_id = LINK_ID_FETCHLAYER0; 130*0e177d5cSLiu Ying fu->id = DC_FETCHUNIT_FL0; 131*0e177d5cSLiu Ying for (i = 0; i < DC_FETCHUNIT_FRAC_NUM; i++) { 132*0e177d5cSLiu Ying fu->reg_baseaddr[i] = BASEADDRESS(i); 133*0e177d5cSLiu Ying fu->reg_sourcebufferattributes[i] = SOURCEBUFFERATTRIBUTES(i); 134*0e177d5cSLiu Ying fu->reg_sourcebufferdimension[i] = SOURCEBUFFERDIMENSION(i); 135*0e177d5cSLiu Ying fu->reg_layeroffset[i] = LAYEROFFSET(i); 136*0e177d5cSLiu Ying fu->reg_clipwindowoffset[i] = CLIPWINDOWOFFSET(i); 137*0e177d5cSLiu Ying fu->reg_clipwindowdimensions[i] = CLIPWINDOWDIMENSIONS(i); 138*0e177d5cSLiu Ying fu->reg_constantcolor[i] = CONSTANTCOLOR(i); 139*0e177d5cSLiu Ying fu->reg_layerproperty[i] = LAYERPROPERTY(i); 140*0e177d5cSLiu Ying } 141*0e177d5cSLiu Ying snprintf(fu->name, sizeof(fu->name), "FetchLayer%d", id); 142*0e177d5cSLiu Ying 143*0e177d5cSLiu Ying dc_fl_set_ops(fu); 144*0e177d5cSLiu Ying 145*0e177d5cSLiu Ying dc_drm->fu_disp[fu->id] = fu; 146*0e177d5cSLiu Ying 147*0e177d5cSLiu Ying return 0; 148*0e177d5cSLiu Ying } 149*0e177d5cSLiu Ying 150*0e177d5cSLiu Ying static const struct component_ops dc_fl_ops = { 151*0e177d5cSLiu Ying .bind = dc_fl_bind, 152*0e177d5cSLiu Ying }; 153*0e177d5cSLiu Ying 154*0e177d5cSLiu Ying static int dc_fl_probe(struct platform_device *pdev) 155*0e177d5cSLiu Ying { 156*0e177d5cSLiu Ying int ret; 157*0e177d5cSLiu Ying 158*0e177d5cSLiu Ying ret = component_add(&pdev->dev, &dc_fl_ops); 159*0e177d5cSLiu Ying if (ret) 160*0e177d5cSLiu Ying return dev_err_probe(&pdev->dev, ret, 161*0e177d5cSLiu Ying "failed to add component\n"); 162*0e177d5cSLiu Ying 163*0e177d5cSLiu Ying return 0; 164*0e177d5cSLiu Ying } 165*0e177d5cSLiu Ying 166*0e177d5cSLiu Ying static void dc_fl_remove(struct platform_device *pdev) 167*0e177d5cSLiu Ying { 168*0e177d5cSLiu Ying component_del(&pdev->dev, &dc_fl_ops); 169*0e177d5cSLiu Ying } 170*0e177d5cSLiu Ying 171*0e177d5cSLiu Ying static const struct of_device_id dc_fl_dt_ids[] = { 172*0e177d5cSLiu Ying { .compatible = "fsl,imx8qxp-dc-fetchlayer" }, 173*0e177d5cSLiu Ying { /* sentinel */ } 174*0e177d5cSLiu Ying }; 175*0e177d5cSLiu Ying MODULE_DEVICE_TABLE(of, dc_fl_dt_ids); 176*0e177d5cSLiu Ying 177*0e177d5cSLiu Ying struct platform_driver dc_fl_driver = { 178*0e177d5cSLiu Ying .probe = dc_fl_probe, 179*0e177d5cSLiu Ying .remove = dc_fl_remove, 180*0e177d5cSLiu Ying .driver = { 181*0e177d5cSLiu Ying .name = "imx8-dc-fetchlayer", 182*0e177d5cSLiu Ying .suppress_bind_attrs = true, 183*0e177d5cSLiu Ying .of_match_table = dc_fl_dt_ids, 184*0e177d5cSLiu Ying }, 185*0e177d5cSLiu Ying }; 186