1 /* SPDX-License-Identifier: GPL-2.0+ */ 2 /* 3 * Copyright 2024 NXP 4 */ 5 6 #ifndef __DC_DISPLAY_ENGINE_H__ 7 #define __DC_DISPLAY_ENGINE_H__ 8 9 #include <linux/clk.h> 10 #include <linux/device.h> 11 #include <linux/regmap.h> 12 #include <drm/drm_modes.h> 13 14 #define DC_DISPLAYS 2 15 16 struct dc_fg { 17 struct device *dev; 18 struct regmap *reg; 19 struct clk *clk_disp; 20 }; 21 22 struct dc_tc { 23 struct device *dev; 24 struct regmap *reg; 25 }; 26 27 struct dc_de { 28 struct device *dev; 29 struct regmap *reg_top; 30 struct dc_fg *fg; 31 struct dc_tc *tc; 32 int irq_shdload; 33 int irq_framecomplete; 34 int irq_seqcomplete; 35 }; 36 37 /* Frame Generator Unit */ 38 void dc_fg_cfg_videomode(struct dc_fg *fg, struct drm_display_mode *m); 39 void dc_fg_enable(struct dc_fg *fg); 40 void dc_fg_disable(struct dc_fg *fg); 41 void dc_fg_shdtokgen(struct dc_fg *fg); 42 u32 dc_fg_get_frame_index(struct dc_fg *fg); 43 u32 dc_fg_get_line_index(struct dc_fg *fg); 44 bool dc_fg_wait_for_frame_index_moving(struct dc_fg *fg); 45 bool dc_fg_secondary_requests_to_read_empty_fifo(struct dc_fg *fg); 46 void dc_fg_secondary_clear_channel_status(struct dc_fg *fg); 47 int dc_fg_wait_for_secondary_syncup(struct dc_fg *fg); 48 void dc_fg_enable_clock(struct dc_fg *fg); 49 void dc_fg_disable_clock(struct dc_fg *fg); 50 enum drm_mode_status dc_fg_check_clock(struct dc_fg *fg, int clk_khz); 51 void dc_fg_init(struct dc_fg *fg); 52 53 /* Timing Controller Unit */ 54 void dc_tc_init(struct dc_tc *tc); 55 56 #endif /* __DC_DISPLAY_ENGINE_H__ */ 57