xref: /linux/drivers/gpu/drm/imx/dc/dc-de.c (revision 72856afd33f2fa166c06f1536003e300e51ecf09)
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright 2024 NXP
4  */
5 
6 #include <linux/component.h>
7 #include <linux/module.h>
8 #include <linux/of_platform.h>
9 #include <linux/platform_device.h>
10 #include <linux/pm.h>
11 #include <linux/pm_runtime.h>
12 #include <linux/regmap.h>
13 
14 #include "dc-de.h"
15 #include "dc-drv.h"
16 
17 #define POLARITYCTRL		0xc
18 #define  POLEN_HIGH		BIT(2)
19 
20 static const struct dc_subdev_info dc_de_info[] = {
21 	{ .reg_start = 0x5618b400, .id = 0, },
22 	{ .reg_start = 0x5618b420, .id = 1, },
23 };
24 
25 static const struct regmap_range dc_de_regmap_ranges[] = {
26 	regmap_reg_range(POLARITYCTRL, POLARITYCTRL),
27 };
28 
29 static const struct regmap_access_table dc_de_regmap_access_table = {
30 	.yes_ranges = dc_de_regmap_ranges,
31 	.n_yes_ranges = ARRAY_SIZE(dc_de_regmap_ranges),
32 };
33 
34 static const struct regmap_config dc_de_top_regmap_config = {
35 	.name = "top",
36 	.reg_bits = 32,
37 	.reg_stride = 4,
38 	.val_bits = 32,
39 	.fast_io = true,
40 	.wr_table = &dc_de_regmap_access_table,
41 	.rd_table = &dc_de_regmap_access_table,
42 	.max_register = POLARITYCTRL,
43 };
44 
45 static inline void dc_dec_init(struct dc_de *de)
46 {
47 	regmap_write_bits(de->reg_top, POLARITYCTRL, POLARITYCTRL, POLEN_HIGH);
48 }
49 
50 static int dc_de_bind(struct device *dev, struct device *master, void *data)
51 {
52 	struct platform_device *pdev = to_platform_device(dev);
53 	struct dc_drm_device *dc_drm = data;
54 	struct resource *res_top;
55 	void __iomem *base_top;
56 	struct dc_de *de;
57 	int ret, id;
58 
59 	de = devm_kzalloc(dev, sizeof(*de), GFP_KERNEL);
60 	if (!de)
61 		return -ENOMEM;
62 
63 	base_top = devm_platform_get_and_ioremap_resource(pdev, 0, &res_top);
64 	if (IS_ERR(base_top))
65 		return PTR_ERR(base_top);
66 
67 	de->reg_top = devm_regmap_init_mmio(dev, base_top,
68 					    &dc_de_top_regmap_config);
69 	if (IS_ERR(de->reg_top))
70 		return PTR_ERR(de->reg_top);
71 
72 	de->irq_shdload = platform_get_irq_byname(pdev, "shdload");
73 	if (de->irq_shdload < 0)
74 		return de->irq_shdload;
75 
76 	de->irq_framecomplete = platform_get_irq_byname(pdev, "framecomplete");
77 	if (de->irq_framecomplete < 0)
78 		return de->irq_framecomplete;
79 
80 	de->irq_seqcomplete = platform_get_irq_byname(pdev, "seqcomplete");
81 	if (de->irq_seqcomplete < 0)
82 		return de->irq_seqcomplete;
83 
84 	de->dev = dev;
85 
86 	dev_set_drvdata(dev, de);
87 
88 	ret = devm_pm_runtime_enable(dev);
89 	if (ret)
90 		return ret;
91 
92 	id = dc_subdev_get_id(dc_de_info, ARRAY_SIZE(dc_de_info), res_top);
93 	if (id < 0) {
94 		dev_err(dev, "failed to get instance number: %d\n", id);
95 		return id;
96 	}
97 
98 	dc_drm->de[id] = de;
99 
100 	return 0;
101 }
102 
103 /*
104  * It's possible to get the child device pointers from the child component
105  * bind callbacks, but it depends on the component helper behavior to bind
106  * the display engine component first.  To avoid the dependency, post bind
107  * to get the pointers from dc_drm in a safe manner.
108  */
109 void dc_de_post_bind(struct dc_drm_device *dc_drm)
110 {
111 	struct dc_de *de;
112 	int i;
113 
114 	for (i = 0; i < DC_DISPLAYS; i++) {
115 		de = dc_drm->de[i];
116 		de->fg = dc_drm->fg[i];
117 		de->tc = dc_drm->tc[i];
118 	}
119 }
120 
121 static const struct component_ops dc_de_ops = {
122 	.bind = dc_de_bind,
123 };
124 
125 static int dc_de_probe(struct platform_device *pdev)
126 {
127 	int ret;
128 
129 	ret = devm_of_platform_populate(&pdev->dev);
130 	if (ret < 0)
131 		return ret;
132 
133 	ret = component_add(&pdev->dev, &dc_de_ops);
134 	if (ret)
135 		return dev_err_probe(&pdev->dev, ret,
136 				     "failed to add component\n");
137 
138 	return 0;
139 }
140 
141 static void dc_de_remove(struct platform_device *pdev)
142 {
143 	component_del(&pdev->dev, &dc_de_ops);
144 }
145 
146 static int dc_de_runtime_resume(struct device *dev)
147 {
148 	struct dc_de *de = dev_get_drvdata(dev);
149 
150 	dc_dec_init(de);
151 	dc_fg_init(de->fg);
152 	dc_tc_init(de->tc);
153 
154 	return 0;
155 }
156 
157 static const struct dev_pm_ops dc_de_pm_ops = {
158 	RUNTIME_PM_OPS(NULL, dc_de_runtime_resume, NULL)
159 };
160 
161 static const struct of_device_id dc_de_dt_ids[] = {
162 	{ .compatible = "fsl,imx8qxp-dc-display-engine" },
163 	{ /* sentinel */ }
164 };
165 MODULE_DEVICE_TABLE(of, dc_de_dt_ids);
166 
167 struct platform_driver dc_de_driver = {
168 	.probe = dc_de_probe,
169 	.remove = dc_de_remove,
170 	.driver = {
171 		.name = "imx8-dc-display-engine",
172 		.suppress_bind_attrs = true,
173 		.of_match_table = dc_de_dt_ids,
174 		.pm = pm_sleep_ptr(&dc_de_pm_ops),
175 	},
176 };
177