xref: /linux/drivers/gpu/drm/imagination/pvr_fw_mips.h (revision 4232da23d75d173195c6766729e51947b64f83cd)
1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
2 /* Copyright (c) 2023 Imagination Technologies Ltd. */
3 
4 #ifndef PVR_FW_MIPS_H
5 #define PVR_FW_MIPS_H
6 
7 #include "pvr_rogue_mips.h"
8 
9 #include <asm/page.h>
10 #include <linux/math.h>
11 #include <linux/types.h>
12 
13 /* Forward declaration from pvr_gem.h. */
14 struct pvr_gem_object;
15 
16 #define PVR_MIPS_PT_PAGE_COUNT DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)
17 
18 /**
19  * struct pvr_fw_mips_data - MIPS-specific data
20  */
21 struct pvr_fw_mips_data {
22 	/**
23 	 * @pt_pages: Pages containing MIPS pagetable.
24 	 */
25 	struct page *pt_pages[PVR_MIPS_PT_PAGE_COUNT];
26 
27 	/** @pt: Pointer to CPU mapping of MIPS pagetable. */
28 	u32 *pt;
29 
30 	/** @pt_dma_addr: DMA mappings of MIPS pagetable. */
31 	dma_addr_t pt_dma_addr[PVR_MIPS_PT_PAGE_COUNT];
32 
33 	/** @boot_code_dma_addr: DMA address of MIPS boot code. */
34 	dma_addr_t boot_code_dma_addr;
35 
36 	/** @boot_data_dma_addr: DMA address of MIPS boot data. */
37 	dma_addr_t boot_data_dma_addr;
38 
39 	/** @exception_code_dma_addr: DMA address of MIPS exception code. */
40 	dma_addr_t exception_code_dma_addr;
41 
42 	/** @cache_policy: Cache policy for this processor. */
43 	u32 cache_policy;
44 
45 	/** @pfn_mask: PFN mask for MIPS pagetable. */
46 	u32 pfn_mask;
47 };
48 
49 #endif /* PVR_FW_MIPS_H */
50