xref: /linux/drivers/gpu/drm/imagination/pvr_fw_mips.h (revision 4232da23d75d173195c6766729e51947b64f83cd)
1927f3e02SSarah Walker /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
2927f3e02SSarah Walker /* Copyright (c) 2023 Imagination Technologies Ltd. */
3927f3e02SSarah Walker 
4927f3e02SSarah Walker #ifndef PVR_FW_MIPS_H
5927f3e02SSarah Walker #define PVR_FW_MIPS_H
6927f3e02SSarah Walker 
7927f3e02SSarah Walker #include "pvr_rogue_mips.h"
8927f3e02SSarah Walker 
9927f3e02SSarah Walker #include <asm/page.h>
10*e4236b14SMatt Coster #include <linux/math.h>
11927f3e02SSarah Walker #include <linux/types.h>
12927f3e02SSarah Walker 
13927f3e02SSarah Walker /* Forward declaration from pvr_gem.h. */
14927f3e02SSarah Walker struct pvr_gem_object;
15927f3e02SSarah Walker 
16*e4236b14SMatt Coster #define PVR_MIPS_PT_PAGE_COUNT DIV_ROUND_UP(ROGUE_MIPSFW_MAX_NUM_PAGETABLE_PAGES * ROGUE_MIPSFW_PAGE_SIZE_4K, PAGE_SIZE)
17*e4236b14SMatt Coster 
18927f3e02SSarah Walker /**
19927f3e02SSarah Walker  * struct pvr_fw_mips_data - MIPS-specific data
20927f3e02SSarah Walker  */
21927f3e02SSarah Walker struct pvr_fw_mips_data {
22927f3e02SSarah Walker 	/**
23927f3e02SSarah Walker 	 * @pt_pages: Pages containing MIPS pagetable.
24927f3e02SSarah Walker 	 */
25927f3e02SSarah Walker 	struct page *pt_pages[PVR_MIPS_PT_PAGE_COUNT];
26927f3e02SSarah Walker 
27927f3e02SSarah Walker 	/** @pt: Pointer to CPU mapping of MIPS pagetable. */
28927f3e02SSarah Walker 	u32 *pt;
29927f3e02SSarah Walker 
30927f3e02SSarah Walker 	/** @pt_dma_addr: DMA mappings of MIPS pagetable. */
31927f3e02SSarah Walker 	dma_addr_t pt_dma_addr[PVR_MIPS_PT_PAGE_COUNT];
32927f3e02SSarah Walker 
33927f3e02SSarah Walker 	/** @boot_code_dma_addr: DMA address of MIPS boot code. */
34927f3e02SSarah Walker 	dma_addr_t boot_code_dma_addr;
35927f3e02SSarah Walker 
36927f3e02SSarah Walker 	/** @boot_data_dma_addr: DMA address of MIPS boot data. */
37927f3e02SSarah Walker 	dma_addr_t boot_data_dma_addr;
38927f3e02SSarah Walker 
39927f3e02SSarah Walker 	/** @exception_code_dma_addr: DMA address of MIPS exception code. */
40927f3e02SSarah Walker 	dma_addr_t exception_code_dma_addr;
41927f3e02SSarah Walker 
42927f3e02SSarah Walker 	/** @cache_policy: Cache policy for this processor. */
43927f3e02SSarah Walker 	u32 cache_policy;
44927f3e02SSarah Walker 
45927f3e02SSarah Walker 	/** @pfn_mask: PFN mask for MIPS pagetable. */
46927f3e02SSarah Walker 	u32 pfn_mask;
47927f3e02SSarah Walker };
48927f3e02SSarah Walker 
49927f3e02SSarah Walker #endif /* PVR_FW_MIPS_H */
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