xref: /linux/drivers/gpu/drm/imagination/pvr_cccb.h (revision e6a901a00822659181c93c86d8bbc2a17779fddc)
1 /* SPDX-License-Identifier: GPL-2.0-only OR MIT */
2 /* Copyright (c) 2023 Imagination Technologies Ltd. */
3 
4 #ifndef PVR_CCCB_H
5 #define PVR_CCCB_H
6 
7 #include "pvr_rogue_fwif.h"
8 #include "pvr_rogue_fwif_shared.h"
9 
10 #include <linux/mutex.h>
11 #include <linux/types.h>
12 
13 #define PADDING_COMMAND_SIZE sizeof(struct rogue_fwif_ccb_cmd_header)
14 
15 /* Forward declaration from pvr_device.h. */
16 struct pvr_device;
17 
18 /* Forward declaration from pvr_gem.h. */
19 struct pvr_fw_object;
20 
21 /* Forward declaration from pvr_hwrt.h. */
22 struct pvr_hwrt_data;
23 
24 struct pvr_cccb {
25 	/** @ctrl_obj: FW object representing CCCB control structure. */
26 	struct pvr_fw_object *ctrl_obj;
27 
28 	/** @ccb_obj: FW object representing CCCB. */
29 	struct pvr_fw_object *cccb_obj;
30 
31 	/**
32 	 * @ctrl: Kernel mapping of CCCB control structure. @lock must be held
33 	 *        when accessing.
34 	 */
35 	struct rogue_fwif_cccb_ctl *ctrl;
36 
37 	/** @cccb: Kernel mapping of CCCB. @lock must be held when accessing.*/
38 	u8 *cccb;
39 
40 	/** @ctrl_fw_addr: FW virtual address of CCCB control structure. */
41 	u32 ctrl_fw_addr;
42 	/** @ccb_fw_addr: FW virtual address of CCCB. */
43 	u32 cccb_fw_addr;
44 
45 	/** @size: Size of CCCB in bytes. */
46 	size_t size;
47 
48 	/** @write_offset: CCCB write offset. */
49 	u32 write_offset;
50 
51 	/** @wrap_mask: CCCB wrap mask. */
52 	u32 wrap_mask;
53 };
54 
55 int pvr_cccb_init(struct pvr_device *pvr_dev, struct pvr_cccb *cccb,
56 		  u32 size_log2, const char *name);
57 void pvr_cccb_fini(struct pvr_cccb *cccb);
58 
59 void pvr_cccb_write_command_with_header(struct pvr_cccb *pvr_cccb,
60 					u32 cmd_type, u32 cmd_size, void *cmd_data,
61 					u32 ext_job_ref, u32 int_job_ref);
62 void pvr_cccb_send_kccb_kick(struct pvr_device *pvr_dev,
63 			     struct pvr_cccb *pvr_cccb, u32 cctx_fw_addr,
64 			     struct pvr_hwrt_data *hwrt);
65 void pvr_cccb_send_kccb_combined_kick(struct pvr_device *pvr_dev,
66 				      struct pvr_cccb *geom_cccb,
67 				      struct pvr_cccb *frag_cccb,
68 				      u32 geom_ctx_fw_addr,
69 				      u32 frag_ctx_fw_addr,
70 				      struct pvr_hwrt_data *hwrt,
71 				      bool frag_is_pr);
72 bool pvr_cccb_cmdseq_fits(struct pvr_cccb *pvr_cccb, size_t size);
73 
74 /**
75  * pvr_cccb_get_size_of_cmd_with_hdr() - Get the size of a command and its header.
76  * @cmd_size: Command size.
77  *
78  * Returns the size of the command and its header.
79  */
80 static __always_inline u32
81 pvr_cccb_get_size_of_cmd_with_hdr(u32 cmd_size)
82 {
83 	WARN_ON(!IS_ALIGNED(cmd_size, 8));
84 	return sizeof(struct rogue_fwif_ccb_cmd_header) + ALIGN(cmd_size, 8);
85 }
86 
87 /**
88  * pvr_cccb_cmdseq_can_fit() - Check if a command sequence can fit in the CCCB.
89  * @pvr_cccb: Target Client CCB.
90  * @size: Command sequence size.
91  *
92  * Returns:
93  *  * true it the CCCB is big enough to contain a command sequence, or
94  *  * false otherwise.
95  */
96 static __always_inline bool
97 pvr_cccb_cmdseq_can_fit(struct pvr_cccb *pvr_cccb, size_t size)
98 {
99 	/* We divide the capacity by two to simplify our CCCB fencing logic:
100 	 * we want to be sure that, no matter what we had queued before, we
101 	 * are able to either queue our command sequence at the end or add a
102 	 * padding command and queue the command sequence at the beginning
103 	 * of the CCCB. If the command sequence size is bigger than half the
104 	 * CCCB capacity, we'd have to queue the padding command and make sure
105 	 * the FW is done processing it before queueing our command sequence.
106 	 */
107 	return size + PADDING_COMMAND_SIZE <= pvr_cccb->size / 2;
108 }
109 
110 #endif /* PVR_CCCB_H */
111