xref: /linux/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c (revision 9f2c9170934eace462499ba0bfe042cc72900173)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright(c) 2020 Intel Corporation.
4  */
5 
6 #include <linux/component.h>
7 
8 #include <drm/i915_pxp_tee_interface.h>
9 #include <drm/i915_component.h>
10 
11 #include "gem/i915_gem_lmem.h"
12 
13 #include "i915_drv.h"
14 #include "intel_pxp.h"
15 #include "intel_pxp_session.h"
16 #include "intel_pxp_tee.h"
17 #include "intel_pxp_cmd_interface_42.h"
18 #include "intel_pxp_huc.h"
19 
20 static inline struct intel_pxp *i915_dev_to_pxp(struct device *i915_kdev)
21 {
22 	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
23 
24 	return &to_gt(i915)->pxp;
25 }
26 
27 static int intel_pxp_tee_io_message(struct intel_pxp *pxp,
28 				    void *msg_in, u32 msg_in_size,
29 				    void *msg_out, u32 msg_out_max_size,
30 				    u32 *msg_out_rcv_size)
31 {
32 	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
33 	struct i915_pxp_component *pxp_component = pxp->pxp_component;
34 	int ret = 0;
35 
36 	mutex_lock(&pxp->tee_mutex);
37 
38 	/*
39 	 * The binding of the component is asynchronous from i915 probe, so we
40 	 * can't be sure it has happened.
41 	 */
42 	if (!pxp_component) {
43 		ret = -ENODEV;
44 		goto unlock;
45 	}
46 
47 	ret = pxp_component->ops->send(pxp_component->tee_dev, msg_in, msg_in_size);
48 	if (ret) {
49 		drm_err(&i915->drm, "Failed to send PXP TEE message\n");
50 		goto unlock;
51 	}
52 
53 	ret = pxp_component->ops->recv(pxp_component->tee_dev, msg_out, msg_out_max_size);
54 	if (ret < 0) {
55 		drm_err(&i915->drm, "Failed to receive PXP TEE message\n");
56 		goto unlock;
57 	}
58 
59 	if (ret > msg_out_max_size) {
60 		drm_err(&i915->drm,
61 			"Failed to receive PXP TEE message due to unexpected output size\n");
62 		ret = -ENOSPC;
63 		goto unlock;
64 	}
65 
66 	if (msg_out_rcv_size)
67 		*msg_out_rcv_size = ret;
68 
69 	ret = 0;
70 unlock:
71 	mutex_unlock(&pxp->tee_mutex);
72 	return ret;
73 }
74 
75 int intel_pxp_tee_stream_message(struct intel_pxp *pxp,
76 				 u8 client_id, u32 fence_id,
77 				 void *msg_in, size_t msg_in_len,
78 				 void *msg_out, size_t msg_out_len)
79 {
80 	/* TODO: for bigger objects we need to use a sg of 4k pages */
81 	const size_t max_msg_size = PAGE_SIZE;
82 	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
83 	struct i915_pxp_component *pxp_component = pxp->pxp_component;
84 	unsigned int offset = 0;
85 	struct scatterlist *sg;
86 	int ret;
87 
88 	if (msg_in_len > max_msg_size || msg_out_len > max_msg_size)
89 		return -ENOSPC;
90 
91 	mutex_lock(&pxp->tee_mutex);
92 
93 	if (unlikely(!pxp_component || !pxp_component->ops->gsc_command)) {
94 		ret = -ENODEV;
95 		goto unlock;
96 	}
97 
98 	GEM_BUG_ON(!pxp->stream_cmd.obj);
99 
100 	sg = i915_gem_object_get_sg_dma(pxp->stream_cmd.obj, 0, &offset);
101 
102 	memcpy(pxp->stream_cmd.vaddr, msg_in, msg_in_len);
103 
104 	ret = pxp_component->ops->gsc_command(pxp_component->tee_dev, client_id,
105 					      fence_id, sg, msg_in_len, sg);
106 	if (ret < 0)
107 		drm_err(&i915->drm, "Failed to send PXP TEE gsc command\n");
108 	else
109 		memcpy(msg_out, pxp->stream_cmd.vaddr, msg_out_len);
110 
111 unlock:
112 	mutex_unlock(&pxp->tee_mutex);
113 	return ret;
114 }
115 
116 /**
117  * i915_pxp_tee_component_bind - bind function to pass the function pointers to pxp_tee
118  * @i915_kdev: pointer to i915 kernel device
119  * @tee_kdev: pointer to tee kernel device
120  * @data: pointer to pxp_tee_master containing the function pointers
121  *
122  * This bind function is called during the system boot or resume from system sleep.
123  *
124  * Return: return 0 if successful.
125  */
126 static int i915_pxp_tee_component_bind(struct device *i915_kdev,
127 				       struct device *tee_kdev, void *data)
128 {
129 	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
130 	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
131 	struct intel_uc *uc = &pxp_to_gt(pxp)->uc;
132 	intel_wakeref_t wakeref;
133 	int ret = 0;
134 
135 	mutex_lock(&pxp->tee_mutex);
136 	pxp->pxp_component = data;
137 	pxp->pxp_component->tee_dev = tee_kdev;
138 	mutex_unlock(&pxp->tee_mutex);
139 
140 	if (intel_uc_uses_huc(uc) && intel_huc_is_loaded_by_gsc(&uc->huc)) {
141 		with_intel_runtime_pm(&i915->runtime_pm, wakeref) {
142 			/* load huc via pxp */
143 			ret = intel_huc_fw_load_and_auth_via_gsc(&uc->huc);
144 			if (ret < 0)
145 				drm_err(&i915->drm, "failed to load huc via gsc %d\n", ret);
146 		}
147 	}
148 
149 	/* if we are suspended, the HW will be re-initialized on resume */
150 	wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm);
151 	if (!wakeref)
152 		return 0;
153 
154 	/* the component is required to fully start the PXP HW */
155 	if (intel_pxp_is_enabled(pxp))
156 		intel_pxp_init_hw(pxp);
157 
158 	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
159 
160 	return ret;
161 }
162 
163 static void i915_pxp_tee_component_unbind(struct device *i915_kdev,
164 					  struct device *tee_kdev, void *data)
165 {
166 	struct drm_i915_private *i915 = kdev_to_i915(i915_kdev);
167 	struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev);
168 	intel_wakeref_t wakeref;
169 
170 	if (intel_pxp_is_enabled(pxp))
171 		with_intel_runtime_pm_if_in_use(&i915->runtime_pm, wakeref)
172 			intel_pxp_fini_hw(pxp);
173 
174 	mutex_lock(&pxp->tee_mutex);
175 	pxp->pxp_component = NULL;
176 	mutex_unlock(&pxp->tee_mutex);
177 }
178 
179 static const struct component_ops i915_pxp_tee_component_ops = {
180 	.bind   = i915_pxp_tee_component_bind,
181 	.unbind = i915_pxp_tee_component_unbind,
182 };
183 
184 static int alloc_streaming_command(struct intel_pxp *pxp)
185 {
186 	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
187 	struct drm_i915_gem_object *obj = NULL;
188 	void *cmd;
189 	int err;
190 
191 	pxp->stream_cmd.obj = NULL;
192 	pxp->stream_cmd.vaddr = NULL;
193 
194 	if (!IS_DGFX(i915))
195 		return 0;
196 
197 	/* allocate lmem object of one page for PXP command memory and store it */
198 	obj = i915_gem_object_create_lmem(i915, PAGE_SIZE, I915_BO_ALLOC_CONTIGUOUS);
199 	if (IS_ERR(obj)) {
200 		drm_err(&i915->drm, "Failed to allocate pxp streaming command!\n");
201 		return PTR_ERR(obj);
202 	}
203 
204 	err = i915_gem_object_pin_pages_unlocked(obj);
205 	if (err) {
206 		drm_err(&i915->drm, "Failed to pin gsc message page!\n");
207 		goto out_put;
208 	}
209 
210 	/* map the lmem into the virtual memory pointer */
211 	cmd = i915_gem_object_pin_map_unlocked(obj, i915_coherent_map_type(i915, obj, true));
212 	if (IS_ERR(cmd)) {
213 		drm_err(&i915->drm, "Failed to map gsc message page!\n");
214 		err = PTR_ERR(cmd);
215 		goto out_unpin;
216 	}
217 
218 	memset(cmd, 0, obj->base.size);
219 
220 	pxp->stream_cmd.obj = obj;
221 	pxp->stream_cmd.vaddr = cmd;
222 
223 	return 0;
224 
225 out_unpin:
226 	i915_gem_object_unpin_pages(obj);
227 out_put:
228 	i915_gem_object_put(obj);
229 	return err;
230 }
231 
232 static void free_streaming_command(struct intel_pxp *pxp)
233 {
234 	struct drm_i915_gem_object *obj = fetch_and_zero(&pxp->stream_cmd.obj);
235 
236 	if (!obj)
237 		return;
238 
239 	i915_gem_object_unpin_map(obj);
240 	i915_gem_object_unpin_pages(obj);
241 	i915_gem_object_put(obj);
242 }
243 
244 int intel_pxp_tee_component_init(struct intel_pxp *pxp)
245 {
246 	int ret;
247 	struct intel_gt *gt = pxp_to_gt(pxp);
248 	struct drm_i915_private *i915 = gt->i915;
249 
250 	mutex_init(&pxp->tee_mutex);
251 
252 	ret = alloc_streaming_command(pxp);
253 	if (ret)
254 		return ret;
255 
256 	ret = component_add_typed(i915->drm.dev, &i915_pxp_tee_component_ops,
257 				  I915_COMPONENT_PXP);
258 	if (ret < 0) {
259 		drm_err(&i915->drm, "Failed to add PXP component (%d)\n", ret);
260 		goto out_free;
261 	}
262 
263 	pxp->pxp_component_added = true;
264 
265 	return 0;
266 
267 out_free:
268 	free_streaming_command(pxp);
269 	return ret;
270 }
271 
272 void intel_pxp_tee_component_fini(struct intel_pxp *pxp)
273 {
274 	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
275 
276 	if (!pxp->pxp_component_added)
277 		return;
278 
279 	component_del(i915->drm.dev, &i915_pxp_tee_component_ops);
280 	pxp->pxp_component_added = false;
281 
282 	free_streaming_command(pxp);
283 }
284 
285 int intel_pxp_tee_cmd_create_arb_session(struct intel_pxp *pxp,
286 					 int arb_session_id)
287 {
288 	struct drm_i915_private *i915 = pxp_to_gt(pxp)->i915;
289 	struct pxp42_create_arb_in msg_in = {0};
290 	struct pxp42_create_arb_out msg_out = {0};
291 	int ret;
292 
293 	msg_in.header.api_version = PXP_APIVER(4, 2);
294 	msg_in.header.command_id = PXP42_CMDID_INIT_SESSION;
295 	msg_in.header.buffer_len = sizeof(msg_in) - sizeof(msg_in.header);
296 	msg_in.protection_mode = PXP42_ARB_SESSION_MODE_HEAVY;
297 	msg_in.session_id = arb_session_id;
298 
299 	ret = intel_pxp_tee_io_message(pxp,
300 				       &msg_in, sizeof(msg_in),
301 				       &msg_out, sizeof(msg_out),
302 				       NULL);
303 
304 	if (ret)
305 		drm_err(&i915->drm, "Failed to send tee msg ret=[%d]\n", ret);
306 	else if (msg_out.header.status != 0x0)
307 		drm_warn(&i915->drm, "PXP firmware failed arb session init request ret=[0x%08x]\n",
308 			 msg_out.header.status);
309 
310 	return ret;
311 }
312