xref: /linux/drivers/gpu/drm/i915/pxp/intel_pxp_huc.c (revision 156010ed9c2ac1e9df6c11b1f688cf8a6e0152e6)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright(c) 2021-2022, Intel Corporation. All rights reserved.
4  */
5 
6 #include <drm/i915_drm.h>
7 
8 #include "i915_drv.h"
9 
10 #include "gem/i915_gem_region.h"
11 #include "gt/intel_gt.h"
12 
13 #include "intel_pxp.h"
14 #include "intel_pxp_huc.h"
15 #include "intel_pxp_tee.h"
16 #include "intel_pxp_types.h"
17 #include "intel_pxp_cmd_interface_43.h"
18 
19 int intel_pxp_huc_load_and_auth(struct intel_pxp *pxp)
20 {
21 	struct intel_gt *gt = pxp_to_gt(pxp);
22 	struct intel_huc *huc = &gt->uc.huc;
23 	struct pxp43_start_huc_auth_in huc_in = {0};
24 	struct pxp43_start_huc_auth_out huc_out = {0};
25 	dma_addr_t huc_phys_addr;
26 	u8 client_id = 0;
27 	u8 fence_id = 0;
28 	int err;
29 
30 	if (!pxp->pxp_component)
31 		return -ENODEV;
32 
33 	huc_phys_addr = i915_gem_object_get_dma_address(huc->fw.obj, 0);
34 
35 	/* write the PXP message into the lmem (the sg list) */
36 	huc_in.header.api_version = PXP_APIVER(4, 3);
37 	huc_in.header.command_id  = PXP43_CMDID_START_HUC_AUTH;
38 	huc_in.header.status      = 0;
39 	huc_in.header.buffer_len  = sizeof(huc_in.huc_base_address);
40 	huc_in.huc_base_address   = huc_phys_addr;
41 
42 	err = intel_pxp_tee_stream_message(pxp, client_id, fence_id,
43 					   &huc_in, sizeof(huc_in),
44 					   &huc_out, sizeof(huc_out));
45 	if (err < 0) {
46 		drm_err(&gt->i915->drm,
47 			"Failed to send HuC load and auth command to GSC [%d]!\n",
48 			err);
49 		return err;
50 	}
51 
52 	/*
53 	 * HuC does sometimes survive suspend/resume (it depends on how "deep"
54 	 * a sleep state the device reaches) so we can end up here on resume
55 	 * with HuC already loaded, in which case the GSC will return
56 	 * PXP_STATUS_OP_NOT_PERMITTED. We can therefore consider the GuC
57 	 * correctly transferred in this scenario; if the same error is ever
58 	 * returned with HuC not loaded we'll still catch it when we check the
59 	 * authentication bit later.
60 	 */
61 	if (huc_out.header.status != PXP_STATUS_SUCCESS &&
62 	    huc_out.header.status != PXP_STATUS_OP_NOT_PERMITTED) {
63 		drm_err(&gt->i915->drm,
64 			"HuC load failed with GSC error = 0x%x\n",
65 			huc_out.header.status);
66 		return -EPROTO;
67 	}
68 
69 	return 0;
70 }
71