1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2020,2021 Intel Corporation 4 */ 5 6 #include "i915_drv.h" 7 #include "intel_step.h" 8 9 /* 10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display 11 * steppings. E.g., in some cases a higher PCI revision may translate to a 12 * lower stepping of the GT and/or display IP. This file provides lookup 13 * tables to map the PCI revision into a standard set of stepping values that 14 * can be compared numerically. 15 * 16 * Also note that some revisions/steppings may have been set aside as 17 * placeholders but never materialized in real hardware; in those cases there 18 * may be jumps in the revision IDs or stepping values in the tables below. 19 */ 20 21 /* 22 * Some platforms always have the same stepping value for GT and display; 23 * use a macro to define these to make it easier to identify the platforms 24 * where the two steppings can deviate. 25 */ 26 #define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x 27 #define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x 28 29 static const struct intel_step_info skl_revids[] = { 30 [0x6] = { COMMON_STEP(G0) }, 31 [0x7] = { COMMON_STEP(H0) }, 32 [0x9] = { COMMON_STEP(J0) }, 33 [0xA] = { COMMON_STEP(I1) }, 34 }; 35 36 static const struct intel_step_info kbl_revids[] = { 37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 }, 40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 }, 41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 }, 42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 }, 43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 }, 44 }; 45 46 static const struct intel_step_info bxt_revids[] = { 47 [0xA] = { COMMON_STEP(C0) }, 48 [0xB] = { COMMON_STEP(C0) }, 49 [0xC] = { COMMON_STEP(D0) }, 50 [0xD] = { COMMON_STEP(E0) }, 51 }; 52 53 static const struct intel_step_info glk_revids[] = { 54 [3] = { COMMON_STEP(B0) }, 55 }; 56 57 static const struct intel_step_info icl_revids[] = { 58 [7] = { COMMON_STEP(D0) }, 59 }; 60 61 static const struct intel_step_info jsl_ehl_revids[] = { 62 [0] = { COMMON_STEP(A0) }, 63 [1] = { COMMON_STEP(B0) }, 64 }; 65 66 static const struct intel_step_info tgl_uy_revids[] = { 67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 71 }; 72 73 /* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */ 74 static const struct intel_step_info tgl_revids[] = { 75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 }, 77 }; 78 79 static const struct intel_step_info rkl_revids[] = { 80 [0] = { COMMON_STEP(A0) }, 81 [1] = { COMMON_STEP(B0) }, 82 [4] = { COMMON_STEP(C0) }, 83 }; 84 85 static const struct intel_step_info dg1_revids[] = { 86 [0] = { COMMON_STEP(A0) }, 87 [1] = { COMMON_STEP(B0) }, 88 }; 89 90 static const struct intel_step_info adls_revids[] = { 91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 }, 93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 96 }; 97 98 static const struct intel_step_info adlp_revids[] = { 99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 103 }; 104 105 static const struct intel_step_info xehpsdv_revids[] = { 106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) }, 107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) }, 108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) }, 109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) }, 110 }; 111 112 static const struct intel_step_info dg2_g10_revid_step_tbl[] = { 113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 }, 115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 117 }; 118 119 static const struct intel_step_info dg2_g11_revid_step_tbl[] = { 120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 123 }; 124 125 static const struct intel_step_info dg2_g12_revid_step_tbl[] = { 126 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 }, 127 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_C0 }, 128 }; 129 130 static const struct intel_step_info adls_rpls_revids[] = { 131 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 }, 132 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 133 }; 134 135 static const struct intel_step_info adlp_rplp_revids[] = { 136 [0x4] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_E0 }, 137 }; 138 139 static const struct intel_step_info adlp_n_revids[] = { 140 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 }, 141 }; 142 143 static u8 gmd_to_intel_step(struct drm_i915_private *i915, 144 struct intel_ip_version *gmd) 145 { 146 u8 step = gmd->step + STEP_A0; 147 148 if (step >= STEP_FUTURE) { 149 drm_dbg(&i915->drm, "Using future steppings\n"); 150 return STEP_FUTURE; 151 } 152 153 return step; 154 } 155 156 static void pvc_step_init(struct drm_i915_private *i915, int pci_revid); 157 158 void intel_step_init(struct drm_i915_private *i915) 159 { 160 const struct intel_step_info *revids = NULL; 161 int size = 0; 162 int revid = INTEL_REVID(i915); 163 struct intel_step_info step = {}; 164 165 if (HAS_GMD_ID(i915)) { 166 step.graphics_step = gmd_to_intel_step(i915, 167 &RUNTIME_INFO(i915)->graphics.ip); 168 step.media_step = gmd_to_intel_step(i915, 169 &RUNTIME_INFO(i915)->media.ip); 170 step.display_step = STEP_A0 + DISPLAY_RUNTIME_INFO(i915)->ip.step; 171 if (step.display_step >= STEP_FUTURE) { 172 drm_dbg(&i915->drm, "Using future display steppings\n"); 173 step.display_step = STEP_FUTURE; 174 } 175 176 RUNTIME_INFO(i915)->step = step; 177 178 return; 179 } 180 181 if (IS_PONTEVECCHIO(i915)) { 182 pvc_step_init(i915, revid); 183 return; 184 } else if (IS_DG2_G10(i915)) { 185 revids = dg2_g10_revid_step_tbl; 186 size = ARRAY_SIZE(dg2_g10_revid_step_tbl); 187 } else if (IS_DG2_G11(i915)) { 188 revids = dg2_g11_revid_step_tbl; 189 size = ARRAY_SIZE(dg2_g11_revid_step_tbl); 190 } else if (IS_DG2_G12(i915)) { 191 revids = dg2_g12_revid_step_tbl; 192 size = ARRAY_SIZE(dg2_g12_revid_step_tbl); 193 } else if (IS_XEHPSDV(i915)) { 194 revids = xehpsdv_revids; 195 size = ARRAY_SIZE(xehpsdv_revids); 196 } else if (IS_ALDERLAKE_P_N(i915)) { 197 revids = adlp_n_revids; 198 size = ARRAY_SIZE(adlp_n_revids); 199 } else if (IS_RAPTORLAKE_P(i915)) { 200 revids = adlp_rplp_revids; 201 size = ARRAY_SIZE(adlp_rplp_revids); 202 } else if (IS_ALDERLAKE_P(i915)) { 203 revids = adlp_revids; 204 size = ARRAY_SIZE(adlp_revids); 205 } else if (IS_RAPTORLAKE_S(i915)) { 206 revids = adls_rpls_revids; 207 size = ARRAY_SIZE(adls_rpls_revids); 208 } else if (IS_ALDERLAKE_S(i915)) { 209 revids = adls_revids; 210 size = ARRAY_SIZE(adls_revids); 211 } else if (IS_DG1(i915)) { 212 revids = dg1_revids; 213 size = ARRAY_SIZE(dg1_revids); 214 } else if (IS_ROCKETLAKE(i915)) { 215 revids = rkl_revids; 216 size = ARRAY_SIZE(rkl_revids); 217 } else if (IS_TIGERLAKE_UY(i915)) { 218 revids = tgl_uy_revids; 219 size = ARRAY_SIZE(tgl_uy_revids); 220 } else if (IS_TIGERLAKE(i915)) { 221 revids = tgl_revids; 222 size = ARRAY_SIZE(tgl_revids); 223 } else if (IS_JASPERLAKE(i915) || IS_ELKHARTLAKE(i915)) { 224 revids = jsl_ehl_revids; 225 size = ARRAY_SIZE(jsl_ehl_revids); 226 } else if (IS_ICELAKE(i915)) { 227 revids = icl_revids; 228 size = ARRAY_SIZE(icl_revids); 229 } else if (IS_GEMINILAKE(i915)) { 230 revids = glk_revids; 231 size = ARRAY_SIZE(glk_revids); 232 } else if (IS_BROXTON(i915)) { 233 revids = bxt_revids; 234 size = ARRAY_SIZE(bxt_revids); 235 } else if (IS_KABYLAKE(i915)) { 236 revids = kbl_revids; 237 size = ARRAY_SIZE(kbl_revids); 238 } else if (IS_SKYLAKE(i915)) { 239 revids = skl_revids; 240 size = ARRAY_SIZE(skl_revids); 241 } 242 243 /* Not using the stepping scheme for the platform yet. */ 244 if (!revids) 245 return; 246 247 if (revid < size && revids[revid].graphics_step != STEP_NONE) { 248 step = revids[revid]; 249 } else { 250 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid); 251 252 /* 253 * If we hit a gap in the revid array, use the information for 254 * the next revid. 255 * 256 * This may be wrong in all sorts of ways, especially if the 257 * steppings in the array are not monotonically increasing, but 258 * it's better than defaulting to 0. 259 */ 260 while (revid < size && revids[revid].graphics_step == STEP_NONE) 261 revid++; 262 263 if (revid < size) { 264 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n", 265 revid); 266 step = revids[revid]; 267 } else { 268 drm_dbg(&i915->drm, "Using future steppings\n"); 269 step.graphics_step = STEP_FUTURE; 270 step.display_step = STEP_FUTURE; 271 } 272 } 273 274 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE)) 275 return; 276 277 RUNTIME_INFO(i915)->step = step; 278 } 279 280 #define PVC_BD_REVID GENMASK(5, 3) 281 #define PVC_CT_REVID GENMASK(2, 0) 282 283 static const int pvc_bd_subids[] = { 284 [0x0] = STEP_A0, 285 [0x3] = STEP_B0, 286 [0x4] = STEP_B1, 287 [0x5] = STEP_B3, 288 }; 289 290 static const int pvc_ct_subids[] = { 291 [0x3] = STEP_A0, 292 [0x5] = STEP_B0, 293 [0x6] = STEP_B1, 294 [0x7] = STEP_C0, 295 }; 296 297 static int 298 pvc_step_lookup(struct drm_i915_private *i915, const char *type, 299 const int *table, int size, int subid) 300 { 301 if (subid < size && table[subid] != STEP_NONE) 302 return table[subid]; 303 304 drm_warn(&i915->drm, "Unknown %s id 0x%02x\n", type, subid); 305 306 /* 307 * As on other platforms, try to use the next higher ID if we land on a 308 * gap in the table. 309 */ 310 while (subid < size && table[subid] == STEP_NONE) 311 subid++; 312 313 if (subid < size) { 314 drm_dbg(&i915->drm, "Using steppings for %s id 0x%02x\n", 315 type, subid); 316 return table[subid]; 317 } 318 319 drm_dbg(&i915->drm, "Using future steppings\n"); 320 return STEP_FUTURE; 321 } 322 323 /* 324 * PVC needs special handling since we don't lookup the 325 * revid in a table, but rather specific bitfields within 326 * the revid for various components. 327 */ 328 static void pvc_step_init(struct drm_i915_private *i915, int pci_revid) 329 { 330 int ct_subid, bd_subid; 331 332 bd_subid = FIELD_GET(PVC_BD_REVID, pci_revid); 333 ct_subid = FIELD_GET(PVC_CT_REVID, pci_revid); 334 335 RUNTIME_INFO(i915)->step.basedie_step = 336 pvc_step_lookup(i915, "Base Die", pvc_bd_subids, 337 ARRAY_SIZE(pvc_bd_subids), bd_subid); 338 RUNTIME_INFO(i915)->step.graphics_step = 339 pvc_step_lookup(i915, "Compute Tile", pvc_ct_subids, 340 ARRAY_SIZE(pvc_ct_subids), ct_subid); 341 } 342 343 #define STEP_NAME_CASE(name) \ 344 case STEP_##name: \ 345 return #name; 346 347 const char *intel_step_name(enum intel_step step) 348 { 349 switch (step) { 350 STEP_NAME_LIST(STEP_NAME_CASE); 351 352 default: 353 return "**"; 354 } 355 } 356 357 const char *intel_display_step_name(struct drm_i915_private *i915) 358 { 359 return intel_step_name(RUNTIME_INFO(i915)->step.display_step); 360 } 361