1 /* 2 * Copyright © 2012 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Ben Widawsky <ben@bwidawsk.net> 25 * 26 */ 27 28 #include <linux/device.h> 29 #include <linux/module.h> 30 #include <linux/stat.h> 31 #include <linux/sysfs.h> 32 33 #include <drm/drm_print.h> 34 35 #include "gt/intel_gt_regs.h" 36 #include "gt/intel_rc6.h" 37 #include "gt/intel_rps.h" 38 #include "gt/sysfs_engines.h" 39 40 #include "i915_drv.h" 41 #include "i915_sysfs.h" 42 43 struct drm_i915_private *kdev_minor_to_i915(struct device *kdev) 44 { 45 struct drm_minor *minor = dev_get_drvdata(kdev); 46 return to_i915(minor->dev); 47 } 48 49 static int l3_access_valid(struct drm_i915_private *i915, loff_t offset) 50 { 51 if (!HAS_L3_DPF(i915)) 52 return -EPERM; 53 54 if (!IS_ALIGNED(offset, sizeof(u32))) 55 return -EINVAL; 56 57 if (offset >= GEN7_L3LOG_SIZE) 58 return -ENXIO; 59 60 return 0; 61 } 62 63 static ssize_t 64 i915_l3_read(struct file *filp, struct kobject *kobj, 65 const struct bin_attribute *attr, char *buf, 66 loff_t offset, size_t count) 67 { 68 struct device *kdev = kobj_to_dev(kobj); 69 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 70 int slice = (int)(uintptr_t)attr->private; 71 int ret; 72 73 ret = l3_access_valid(i915, offset); 74 if (ret) 75 return ret; 76 77 count = round_down(count, sizeof(u32)); 78 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count); 79 memset(buf, 0, count); 80 81 spin_lock(&i915->gem.contexts.lock); 82 if (i915->l3_parity.remap_info[slice]) 83 memcpy(buf, 84 i915->l3_parity.remap_info[slice] + offset / sizeof(u32), 85 count); 86 spin_unlock(&i915->gem.contexts.lock); 87 88 return count; 89 } 90 91 static ssize_t 92 i915_l3_write(struct file *filp, struct kobject *kobj, 93 const struct bin_attribute *attr, char *buf, 94 loff_t offset, size_t count) 95 { 96 struct device *kdev = kobj_to_dev(kobj); 97 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 98 int slice = (int)(uintptr_t)attr->private; 99 u32 *remap_info, *freeme = NULL; 100 struct i915_gem_context *ctx; 101 int ret; 102 103 ret = l3_access_valid(i915, offset); 104 if (ret) 105 return ret; 106 107 if (count < sizeof(u32)) 108 return -EINVAL; 109 110 remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL); 111 if (!remap_info) 112 return -ENOMEM; 113 114 spin_lock(&i915->gem.contexts.lock); 115 116 if (i915->l3_parity.remap_info[slice]) { 117 freeme = remap_info; 118 remap_info = i915->l3_parity.remap_info[slice]; 119 } else { 120 i915->l3_parity.remap_info[slice] = remap_info; 121 } 122 123 count = round_down(count, sizeof(u32)); 124 memcpy(remap_info + offset / sizeof(u32), buf, count); 125 126 /* NB: We defer the remapping until we switch to the context */ 127 list_for_each_entry(ctx, &i915->gem.contexts.list, link) 128 ctx->remap_slice |= BIT(slice); 129 130 spin_unlock(&i915->gem.contexts.lock); 131 kfree(freeme); 132 133 /* 134 * TODO: Ideally we really want a GPU reset here to make sure errors 135 * aren't propagated. Since I cannot find a stable way to reset the GPU 136 * at this point it is left as a TODO. 137 */ 138 139 return count; 140 } 141 142 static const struct bin_attribute dpf_attrs = { 143 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)}, 144 .size = GEN7_L3LOG_SIZE, 145 .read = i915_l3_read, 146 .write = i915_l3_write, 147 .mmap = NULL, 148 .private = (void *)0 149 }; 150 151 static const struct bin_attribute dpf_attrs_1 = { 152 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)}, 153 .size = GEN7_L3LOG_SIZE, 154 .read = i915_l3_read, 155 .write = i915_l3_write, 156 .mmap = NULL, 157 .private = (void *)1 158 }; 159 160 void i915_setup_sysfs(struct drm_i915_private *dev_priv) 161 { 162 struct device *kdev = dev_priv->drm.primary->kdev; 163 int ret; 164 165 if (HAS_L3_DPF(dev_priv)) { 166 ret = device_create_bin_file(kdev, &dpf_attrs); 167 if (ret) 168 drm_err(&dev_priv->drm, 169 "l3 parity sysfs setup failed\n"); 170 171 if (NUM_L3_SLICES(dev_priv) > 1) { 172 ret = device_create_bin_file(kdev, 173 &dpf_attrs_1); 174 if (ret) 175 drm_err(&dev_priv->drm, 176 "l3 parity slice 1 setup failed\n"); 177 } 178 } 179 180 dev_priv->sysfs_gt = kobject_create_and_add("gt", &kdev->kobj); 181 if (!dev_priv->sysfs_gt) 182 drm_warn(&dev_priv->drm, 183 "failed to register GT sysfs directory\n"); 184 185 i915_gpu_error_sysfs_setup(dev_priv); 186 187 intel_engines_add_sysfs(dev_priv); 188 } 189 190 void i915_teardown_sysfs(struct drm_i915_private *dev_priv) 191 { 192 struct device *kdev = dev_priv->drm.primary->kdev; 193 194 i915_gpu_error_sysfs_teardown(dev_priv); 195 196 device_remove_bin_file(kdev, &dpf_attrs_1); 197 device_remove_bin_file(kdev, &dpf_attrs); 198 199 kobject_put(dev_priv->sysfs_gt); 200 } 201