1 /* 2 * Copyright © 2012 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Ben Widawsky <ben@bwidawsk.net> 25 * 26 */ 27 28 #include <linux/device.h> 29 #include <linux/module.h> 30 #include <linux/stat.h> 31 #include <linux/sysfs.h> 32 33 #include "gt/intel_gt_regs.h" 34 #include "gt/intel_rc6.h" 35 #include "gt/intel_rps.h" 36 #include "gt/sysfs_engines.h" 37 38 #include "i915_drv.h" 39 #include "i915_sysfs.h" 40 41 struct drm_i915_private *kdev_minor_to_i915(struct device *kdev) 42 { 43 struct drm_minor *minor = dev_get_drvdata(kdev); 44 return to_i915(minor->dev); 45 } 46 47 static int l3_access_valid(struct drm_i915_private *i915, loff_t offset) 48 { 49 if (!HAS_L3_DPF(i915)) 50 return -EPERM; 51 52 if (!IS_ALIGNED(offset, sizeof(u32))) 53 return -EINVAL; 54 55 if (offset >= GEN7_L3LOG_SIZE) 56 return -ENXIO; 57 58 return 0; 59 } 60 61 static ssize_t 62 i915_l3_read(struct file *filp, struct kobject *kobj, 63 struct bin_attribute *attr, char *buf, 64 loff_t offset, size_t count) 65 { 66 struct device *kdev = kobj_to_dev(kobj); 67 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 68 int slice = (int)(uintptr_t)attr->private; 69 int ret; 70 71 ret = l3_access_valid(i915, offset); 72 if (ret) 73 return ret; 74 75 count = round_down(count, sizeof(u32)); 76 count = min_t(size_t, GEN7_L3LOG_SIZE - offset, count); 77 memset(buf, 0, count); 78 79 spin_lock(&i915->gem.contexts.lock); 80 if (i915->l3_parity.remap_info[slice]) 81 memcpy(buf, 82 i915->l3_parity.remap_info[slice] + offset / sizeof(u32), 83 count); 84 spin_unlock(&i915->gem.contexts.lock); 85 86 return count; 87 } 88 89 static ssize_t 90 i915_l3_write(struct file *filp, struct kobject *kobj, 91 struct bin_attribute *attr, char *buf, 92 loff_t offset, size_t count) 93 { 94 struct device *kdev = kobj_to_dev(kobj); 95 struct drm_i915_private *i915 = kdev_minor_to_i915(kdev); 96 int slice = (int)(uintptr_t)attr->private; 97 u32 *remap_info, *freeme = NULL; 98 struct i915_gem_context *ctx; 99 int ret; 100 101 ret = l3_access_valid(i915, offset); 102 if (ret) 103 return ret; 104 105 if (count < sizeof(u32)) 106 return -EINVAL; 107 108 remap_info = kzalloc(GEN7_L3LOG_SIZE, GFP_KERNEL); 109 if (!remap_info) 110 return -ENOMEM; 111 112 spin_lock(&i915->gem.contexts.lock); 113 114 if (i915->l3_parity.remap_info[slice]) { 115 freeme = remap_info; 116 remap_info = i915->l3_parity.remap_info[slice]; 117 } else { 118 i915->l3_parity.remap_info[slice] = remap_info; 119 } 120 121 count = round_down(count, sizeof(u32)); 122 memcpy(remap_info + offset / sizeof(u32), buf, count); 123 124 /* NB: We defer the remapping until we switch to the context */ 125 list_for_each_entry(ctx, &i915->gem.contexts.list, link) 126 ctx->remap_slice |= BIT(slice); 127 128 spin_unlock(&i915->gem.contexts.lock); 129 kfree(freeme); 130 131 /* 132 * TODO: Ideally we really want a GPU reset here to make sure errors 133 * aren't propagated. Since I cannot find a stable way to reset the GPU 134 * at this point it is left as a TODO. 135 */ 136 137 return count; 138 } 139 140 static const struct bin_attribute dpf_attrs = { 141 .attr = {.name = "l3_parity", .mode = (S_IRUSR | S_IWUSR)}, 142 .size = GEN7_L3LOG_SIZE, 143 .read = i915_l3_read, 144 .write = i915_l3_write, 145 .mmap = NULL, 146 .private = (void *)0 147 }; 148 149 static const struct bin_attribute dpf_attrs_1 = { 150 .attr = {.name = "l3_parity_slice_1", .mode = (S_IRUSR | S_IWUSR)}, 151 .size = GEN7_L3LOG_SIZE, 152 .read = i915_l3_read, 153 .write = i915_l3_write, 154 .mmap = NULL, 155 .private = (void *)1 156 }; 157 158 void i915_setup_sysfs(struct drm_i915_private *dev_priv) 159 { 160 struct device *kdev = dev_priv->drm.primary->kdev; 161 int ret; 162 163 if (HAS_L3_DPF(dev_priv)) { 164 ret = device_create_bin_file(kdev, &dpf_attrs); 165 if (ret) 166 drm_err(&dev_priv->drm, 167 "l3 parity sysfs setup failed\n"); 168 169 if (NUM_L3_SLICES(dev_priv) > 1) { 170 ret = device_create_bin_file(kdev, 171 &dpf_attrs_1); 172 if (ret) 173 drm_err(&dev_priv->drm, 174 "l3 parity slice 1 setup failed\n"); 175 } 176 } 177 178 dev_priv->sysfs_gt = kobject_create_and_add("gt", &kdev->kobj); 179 if (!dev_priv->sysfs_gt) 180 drm_warn(&dev_priv->drm, 181 "failed to register GT sysfs directory\n"); 182 183 i915_gpu_error_sysfs_setup(dev_priv); 184 185 intel_engines_add_sysfs(dev_priv); 186 } 187 188 void i915_teardown_sysfs(struct drm_i915_private *dev_priv) 189 { 190 struct device *kdev = dev_priv->drm.primary->kdev; 191 192 i915_gpu_error_sysfs_teardown(dev_priv); 193 194 device_remove_bin_file(kdev, &dpf_attrs_1); 195 device_remove_bin_file(kdev, &dpf_attrs); 196 197 kobject_put(dev_priv->sysfs_gt); 198 } 199