1 /* 2 * Copyright © 2008 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 * Authors: 24 * Eric Anholt <eric@anholt.net> 25 * Keith Packard <keithp@keithp.com> 26 * 27 */ 28 29 #include <linux/seq_file.h> 30 #include <linux/debugfs.h> 31 #include <linux/slab.h> 32 #include "drmP.h" 33 #include "drm.h" 34 #include "i915_drm.h" 35 #include "i915_drv.h" 36 37 #define DRM_I915_RING_DEBUG 1 38 39 40 #if defined(CONFIG_DEBUG_FS) 41 42 #define ACTIVE_LIST 1 43 #define FLUSHING_LIST 2 44 #define INACTIVE_LIST 3 45 46 static const char *get_pin_flag(struct drm_i915_gem_object *obj_priv) 47 { 48 if (obj_priv->user_pin_count > 0) 49 return "P"; 50 else if (obj_priv->pin_count > 0) 51 return "p"; 52 else 53 return " "; 54 } 55 56 static const char *get_tiling_flag(struct drm_i915_gem_object *obj_priv) 57 { 58 switch (obj_priv->tiling_mode) { 59 default: 60 case I915_TILING_NONE: return " "; 61 case I915_TILING_X: return "X"; 62 case I915_TILING_Y: return "Y"; 63 } 64 } 65 66 static int i915_gem_object_list_info(struct seq_file *m, void *data) 67 { 68 struct drm_info_node *node = (struct drm_info_node *) m->private; 69 uintptr_t list = (uintptr_t) node->info_ent->data; 70 struct list_head *head; 71 struct drm_device *dev = node->minor->dev; 72 drm_i915_private_t *dev_priv = dev->dev_private; 73 struct drm_i915_gem_object *obj_priv; 74 spinlock_t *lock = NULL; 75 76 switch (list) { 77 case ACTIVE_LIST: 78 seq_printf(m, "Active:\n"); 79 lock = &dev_priv->mm.active_list_lock; 80 head = &dev_priv->mm.active_list; 81 break; 82 case INACTIVE_LIST: 83 seq_printf(m, "Inactive:\n"); 84 head = &dev_priv->mm.inactive_list; 85 break; 86 case FLUSHING_LIST: 87 seq_printf(m, "Flushing:\n"); 88 head = &dev_priv->mm.flushing_list; 89 break; 90 default: 91 DRM_INFO("Ooops, unexpected list\n"); 92 return 0; 93 } 94 95 if (lock) 96 spin_lock(lock); 97 list_for_each_entry(obj_priv, head, list) 98 { 99 struct drm_gem_object *obj = obj_priv->obj; 100 101 seq_printf(m, " %p: %s %8zd %08x %08x %d%s%s", 102 obj, 103 get_pin_flag(obj_priv), 104 obj->size, 105 obj->read_domains, obj->write_domain, 106 obj_priv->last_rendering_seqno, 107 obj_priv->dirty ? " dirty" : "", 108 obj_priv->madv == I915_MADV_DONTNEED ? " purgeable" : ""); 109 110 if (obj->name) 111 seq_printf(m, " (name: %d)", obj->name); 112 if (obj_priv->fence_reg != I915_FENCE_REG_NONE) 113 seq_printf(m, " (fence: %d)", obj_priv->fence_reg); 114 if (obj_priv->gtt_space != NULL) 115 seq_printf(m, " (gtt_offset: %08x)", obj_priv->gtt_offset); 116 117 seq_printf(m, "\n"); 118 } 119 120 if (lock) 121 spin_unlock(lock); 122 return 0; 123 } 124 125 static int i915_gem_request_info(struct seq_file *m, void *data) 126 { 127 struct drm_info_node *node = (struct drm_info_node *) m->private; 128 struct drm_device *dev = node->minor->dev; 129 drm_i915_private_t *dev_priv = dev->dev_private; 130 struct drm_i915_gem_request *gem_request; 131 132 seq_printf(m, "Request:\n"); 133 list_for_each_entry(gem_request, &dev_priv->mm.request_list, list) { 134 seq_printf(m, " %d @ %d\n", 135 gem_request->seqno, 136 (int) (jiffies - gem_request->emitted_jiffies)); 137 } 138 return 0; 139 } 140 141 static int i915_gem_seqno_info(struct seq_file *m, void *data) 142 { 143 struct drm_info_node *node = (struct drm_info_node *) m->private; 144 struct drm_device *dev = node->minor->dev; 145 drm_i915_private_t *dev_priv = dev->dev_private; 146 147 if (dev_priv->hw_status_page != NULL) { 148 seq_printf(m, "Current sequence: %d\n", 149 i915_get_gem_seqno(dev)); 150 } else { 151 seq_printf(m, "Current sequence: hws uninitialized\n"); 152 } 153 seq_printf(m, "Waiter sequence: %d\n", 154 dev_priv->mm.waiting_gem_seqno); 155 seq_printf(m, "IRQ sequence: %d\n", dev_priv->mm.irq_gem_seqno); 156 return 0; 157 } 158 159 160 static int i915_interrupt_info(struct seq_file *m, void *data) 161 { 162 struct drm_info_node *node = (struct drm_info_node *) m->private; 163 struct drm_device *dev = node->minor->dev; 164 drm_i915_private_t *dev_priv = dev->dev_private; 165 166 if (!HAS_PCH_SPLIT(dev)) { 167 seq_printf(m, "Interrupt enable: %08x\n", 168 I915_READ(IER)); 169 seq_printf(m, "Interrupt identity: %08x\n", 170 I915_READ(IIR)); 171 seq_printf(m, "Interrupt mask: %08x\n", 172 I915_READ(IMR)); 173 seq_printf(m, "Pipe A stat: %08x\n", 174 I915_READ(PIPEASTAT)); 175 seq_printf(m, "Pipe B stat: %08x\n", 176 I915_READ(PIPEBSTAT)); 177 } else { 178 seq_printf(m, "North Display Interrupt enable: %08x\n", 179 I915_READ(DEIER)); 180 seq_printf(m, "North Display Interrupt identity: %08x\n", 181 I915_READ(DEIIR)); 182 seq_printf(m, "North Display Interrupt mask: %08x\n", 183 I915_READ(DEIMR)); 184 seq_printf(m, "South Display Interrupt enable: %08x\n", 185 I915_READ(SDEIER)); 186 seq_printf(m, "South Display Interrupt identity: %08x\n", 187 I915_READ(SDEIIR)); 188 seq_printf(m, "South Display Interrupt mask: %08x\n", 189 I915_READ(SDEIMR)); 190 seq_printf(m, "Graphics Interrupt enable: %08x\n", 191 I915_READ(GTIER)); 192 seq_printf(m, "Graphics Interrupt identity: %08x\n", 193 I915_READ(GTIIR)); 194 seq_printf(m, "Graphics Interrupt mask: %08x\n", 195 I915_READ(GTIMR)); 196 } 197 seq_printf(m, "Interrupts received: %d\n", 198 atomic_read(&dev_priv->irq_received)); 199 if (dev_priv->hw_status_page != NULL) { 200 seq_printf(m, "Current sequence: %d\n", 201 i915_get_gem_seqno(dev)); 202 } else { 203 seq_printf(m, "Current sequence: hws uninitialized\n"); 204 } 205 seq_printf(m, "Waiter sequence: %d\n", 206 dev_priv->mm.waiting_gem_seqno); 207 seq_printf(m, "IRQ sequence: %d\n", 208 dev_priv->mm.irq_gem_seqno); 209 return 0; 210 } 211 212 static int i915_gem_fence_regs_info(struct seq_file *m, void *data) 213 { 214 struct drm_info_node *node = (struct drm_info_node *) m->private; 215 struct drm_device *dev = node->minor->dev; 216 drm_i915_private_t *dev_priv = dev->dev_private; 217 int i; 218 219 seq_printf(m, "Reserved fences = %d\n", dev_priv->fence_reg_start); 220 seq_printf(m, "Total fences = %d\n", dev_priv->num_fence_regs); 221 for (i = 0; i < dev_priv->num_fence_regs; i++) { 222 struct drm_gem_object *obj = dev_priv->fence_regs[i].obj; 223 224 if (obj == NULL) { 225 seq_printf(m, "Fenced object[%2d] = unused\n", i); 226 } else { 227 struct drm_i915_gem_object *obj_priv; 228 229 obj_priv = to_intel_bo(obj); 230 seq_printf(m, "Fenced object[%2d] = %p: %s " 231 "%08x %08zx %08x %s %08x %08x %d", 232 i, obj, get_pin_flag(obj_priv), 233 obj_priv->gtt_offset, 234 obj->size, obj_priv->stride, 235 get_tiling_flag(obj_priv), 236 obj->read_domains, obj->write_domain, 237 obj_priv->last_rendering_seqno); 238 if (obj->name) 239 seq_printf(m, " (name: %d)", obj->name); 240 seq_printf(m, "\n"); 241 } 242 } 243 244 return 0; 245 } 246 247 static int i915_hws_info(struct seq_file *m, void *data) 248 { 249 struct drm_info_node *node = (struct drm_info_node *) m->private; 250 struct drm_device *dev = node->minor->dev; 251 drm_i915_private_t *dev_priv = dev->dev_private; 252 int i; 253 volatile u32 *hws; 254 255 hws = (volatile u32 *)dev_priv->hw_status_page; 256 if (hws == NULL) 257 return 0; 258 259 for (i = 0; i < 4096 / sizeof(u32) / 4; i += 4) { 260 seq_printf(m, "0x%08x: 0x%08x 0x%08x 0x%08x 0x%08x\n", 261 i * 4, 262 hws[i], hws[i + 1], hws[i + 2], hws[i + 3]); 263 } 264 return 0; 265 } 266 267 static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_count) 268 { 269 int page, i; 270 uint32_t *mem; 271 272 for (page = 0; page < page_count; page++) { 273 mem = kmap_atomic(pages[page], KM_USER0); 274 for (i = 0; i < PAGE_SIZE; i += 4) 275 seq_printf(m, "%08x : %08x\n", i, mem[i / 4]); 276 kunmap_atomic(mem, KM_USER0); 277 } 278 } 279 280 static int i915_batchbuffer_info(struct seq_file *m, void *data) 281 { 282 struct drm_info_node *node = (struct drm_info_node *) m->private; 283 struct drm_device *dev = node->minor->dev; 284 drm_i915_private_t *dev_priv = dev->dev_private; 285 struct drm_gem_object *obj; 286 struct drm_i915_gem_object *obj_priv; 287 int ret; 288 289 spin_lock(&dev_priv->mm.active_list_lock); 290 291 list_for_each_entry(obj_priv, &dev_priv->mm.active_list, list) { 292 obj = obj_priv->obj; 293 if (obj->read_domains & I915_GEM_DOMAIN_COMMAND) { 294 ret = i915_gem_object_get_pages(obj, 0); 295 if (ret) { 296 DRM_ERROR("Failed to get pages: %d\n", ret); 297 spin_unlock(&dev_priv->mm.active_list_lock); 298 return ret; 299 } 300 301 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj_priv->gtt_offset); 302 i915_dump_pages(m, obj_priv->pages, obj->size / PAGE_SIZE); 303 304 i915_gem_object_put_pages(obj); 305 } 306 } 307 308 spin_unlock(&dev_priv->mm.active_list_lock); 309 310 return 0; 311 } 312 313 static int i915_ringbuffer_data(struct seq_file *m, void *data) 314 { 315 struct drm_info_node *node = (struct drm_info_node *) m->private; 316 struct drm_device *dev = node->minor->dev; 317 drm_i915_private_t *dev_priv = dev->dev_private; 318 u8 *virt; 319 uint32_t *ptr, off; 320 321 if (!dev_priv->ring.ring_obj) { 322 seq_printf(m, "No ringbuffer setup\n"); 323 return 0; 324 } 325 326 virt = dev_priv->ring.virtual_start; 327 328 for (off = 0; off < dev_priv->ring.Size; off += 4) { 329 ptr = (uint32_t *)(virt + off); 330 seq_printf(m, "%08x : %08x\n", off, *ptr); 331 } 332 333 return 0; 334 } 335 336 static int i915_ringbuffer_info(struct seq_file *m, void *data) 337 { 338 struct drm_info_node *node = (struct drm_info_node *) m->private; 339 struct drm_device *dev = node->minor->dev; 340 drm_i915_private_t *dev_priv = dev->dev_private; 341 unsigned int head, tail; 342 343 head = I915_READ(PRB0_HEAD) & HEAD_ADDR; 344 tail = I915_READ(PRB0_TAIL) & TAIL_ADDR; 345 346 seq_printf(m, "RingHead : %08x\n", head); 347 seq_printf(m, "RingTail : %08x\n", tail); 348 seq_printf(m, "RingSize : %08lx\n", dev_priv->ring.Size); 349 seq_printf(m, "Acthd : %08x\n", I915_READ(IS_I965G(dev) ? ACTHD_I965 : ACTHD)); 350 351 return 0; 352 } 353 354 static const char *pin_flag(int pinned) 355 { 356 if (pinned > 0) 357 return " P"; 358 else if (pinned < 0) 359 return " p"; 360 else 361 return ""; 362 } 363 364 static const char *tiling_flag(int tiling) 365 { 366 switch (tiling) { 367 default: 368 case I915_TILING_NONE: return ""; 369 case I915_TILING_X: return " X"; 370 case I915_TILING_Y: return " Y"; 371 } 372 } 373 374 static const char *dirty_flag(int dirty) 375 { 376 return dirty ? " dirty" : ""; 377 } 378 379 static const char *purgeable_flag(int purgeable) 380 { 381 return purgeable ? " purgeable" : ""; 382 } 383 384 static int i915_error_state(struct seq_file *m, void *unused) 385 { 386 struct drm_info_node *node = (struct drm_info_node *) m->private; 387 struct drm_device *dev = node->minor->dev; 388 drm_i915_private_t *dev_priv = dev->dev_private; 389 struct drm_i915_error_state *error; 390 unsigned long flags; 391 int i, page, offset, elt; 392 393 spin_lock_irqsave(&dev_priv->error_lock, flags); 394 if (!dev_priv->first_error) { 395 seq_printf(m, "no error state collected\n"); 396 goto out; 397 } 398 399 error = dev_priv->first_error; 400 401 seq_printf(m, "Time: %ld s %ld us\n", error->time.tv_sec, 402 error->time.tv_usec); 403 seq_printf(m, "PCI ID: 0x%04x\n", dev->pci_device); 404 seq_printf(m, "EIR: 0x%08x\n", error->eir); 405 seq_printf(m, " PGTBL_ER: 0x%08x\n", error->pgtbl_er); 406 seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); 407 seq_printf(m, " IPEIR: 0x%08x\n", error->ipeir); 408 seq_printf(m, " IPEHR: 0x%08x\n", error->ipehr); 409 seq_printf(m, " INSTDONE: 0x%08x\n", error->instdone); 410 seq_printf(m, " ACTHD: 0x%08x\n", error->acthd); 411 if (IS_I965G(dev)) { 412 seq_printf(m, " INSTPS: 0x%08x\n", error->instps); 413 seq_printf(m, " INSTDONE1: 0x%08x\n", error->instdone1); 414 } 415 seq_printf(m, "seqno: 0x%08x\n", error->seqno); 416 417 if (error->active_bo_count) { 418 seq_printf(m, "Buffers [%d]:\n", error->active_bo_count); 419 420 for (i = 0; i < error->active_bo_count; i++) { 421 seq_printf(m, " %08x %8zd %08x %08x %08x%s%s%s%s", 422 error->active_bo[i].gtt_offset, 423 error->active_bo[i].size, 424 error->active_bo[i].read_domains, 425 error->active_bo[i].write_domain, 426 error->active_bo[i].seqno, 427 pin_flag(error->active_bo[i].pinned), 428 tiling_flag(error->active_bo[i].tiling), 429 dirty_flag(error->active_bo[i].dirty), 430 purgeable_flag(error->active_bo[i].purgeable)); 431 432 if (error->active_bo[i].name) 433 seq_printf(m, " (name: %d)", error->active_bo[i].name); 434 if (error->active_bo[i].fence_reg != I915_FENCE_REG_NONE) 435 seq_printf(m, " (fence: %d)", error->active_bo[i].fence_reg); 436 437 seq_printf(m, "\n"); 438 } 439 } 440 441 for (i = 0; i < ARRAY_SIZE(error->batchbuffer); i++) { 442 if (error->batchbuffer[i]) { 443 struct drm_i915_error_object *obj = error->batchbuffer[i]; 444 445 seq_printf(m, "--- gtt_offset = 0x%08x\n", obj->gtt_offset); 446 offset = 0; 447 for (page = 0; page < obj->page_count; page++) { 448 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 449 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); 450 offset += 4; 451 } 452 } 453 } 454 } 455 456 if (error->ringbuffer) { 457 struct drm_i915_error_object *obj = error->ringbuffer; 458 459 seq_printf(m, "--- ringbuffer = 0x%08x\n", obj->gtt_offset); 460 offset = 0; 461 for (page = 0; page < obj->page_count; page++) { 462 for (elt = 0; elt < PAGE_SIZE/4; elt++) { 463 seq_printf(m, "%08x : %08x\n", offset, obj->pages[page][elt]); 464 offset += 4; 465 } 466 } 467 } 468 469 out: 470 spin_unlock_irqrestore(&dev_priv->error_lock, flags); 471 472 return 0; 473 } 474 475 static int i915_rstdby_delays(struct seq_file *m, void *unused) 476 { 477 struct drm_info_node *node = (struct drm_info_node *) m->private; 478 struct drm_device *dev = node->minor->dev; 479 drm_i915_private_t *dev_priv = dev->dev_private; 480 u16 crstanddelay = I915_READ16(CRSTANDVID); 481 482 seq_printf(m, "w/ctx: %d, w/o ctx: %d\n", (crstanddelay >> 8) & 0x3f, (crstanddelay & 0x3f)); 483 484 return 0; 485 } 486 487 static int i915_cur_delayinfo(struct seq_file *m, void *unused) 488 { 489 struct drm_info_node *node = (struct drm_info_node *) m->private; 490 struct drm_device *dev = node->minor->dev; 491 drm_i915_private_t *dev_priv = dev->dev_private; 492 u16 rgvswctl = I915_READ16(MEMSWCTL); 493 494 seq_printf(m, "Last command: 0x%01x\n", (rgvswctl >> 13) & 0x3); 495 seq_printf(m, "Command status: %d\n", (rgvswctl >> 12) & 1); 496 seq_printf(m, "P%d DELAY 0x%02x\n", (rgvswctl >> 8) & 0xf, 497 rgvswctl & 0x3f); 498 499 return 0; 500 } 501 502 static int i915_delayfreq_table(struct seq_file *m, void *unused) 503 { 504 struct drm_info_node *node = (struct drm_info_node *) m->private; 505 struct drm_device *dev = node->minor->dev; 506 drm_i915_private_t *dev_priv = dev->dev_private; 507 u32 delayfreq; 508 int i; 509 510 for (i = 0; i < 16; i++) { 511 delayfreq = I915_READ(PXVFREQ_BASE + i * 4); 512 seq_printf(m, "P%02dVIDFREQ: 0x%08x\n", i, delayfreq); 513 } 514 515 return 0; 516 } 517 518 static inline int MAP_TO_MV(int map) 519 { 520 return 1250 - (map * 25); 521 } 522 523 static int i915_inttoext_table(struct seq_file *m, void *unused) 524 { 525 struct drm_info_node *node = (struct drm_info_node *) m->private; 526 struct drm_device *dev = node->minor->dev; 527 drm_i915_private_t *dev_priv = dev->dev_private; 528 u32 inttoext; 529 int i; 530 531 for (i = 1; i <= 32; i++) { 532 inttoext = I915_READ(INTTOEXT_BASE_ILK + i * 4); 533 seq_printf(m, "INTTOEXT%02d: 0x%08x\n", i, inttoext); 534 } 535 536 return 0; 537 } 538 539 static int i915_drpc_info(struct seq_file *m, void *unused) 540 { 541 struct drm_info_node *node = (struct drm_info_node *) m->private; 542 struct drm_device *dev = node->minor->dev; 543 drm_i915_private_t *dev_priv = dev->dev_private; 544 u32 rgvmodectl = I915_READ(MEMMODECTL); 545 546 seq_printf(m, "HD boost: %s\n", (rgvmodectl & MEMMODE_BOOST_EN) ? 547 "yes" : "no"); 548 seq_printf(m, "Boost freq: %d\n", 549 (rgvmodectl & MEMMODE_BOOST_FREQ_MASK) >> 550 MEMMODE_BOOST_FREQ_SHIFT); 551 seq_printf(m, "HW control enabled: %s\n", 552 rgvmodectl & MEMMODE_HWIDLE_EN ? "yes" : "no"); 553 seq_printf(m, "SW control enabled: %s\n", 554 rgvmodectl & MEMMODE_SWMODE_EN ? "yes" : "no"); 555 seq_printf(m, "Gated voltage change: %s\n", 556 rgvmodectl & MEMMODE_RCLK_GATE ? "yes" : "no"); 557 seq_printf(m, "Starting frequency: P%d\n", 558 (rgvmodectl & MEMMODE_FSTART_MASK) >> MEMMODE_FSTART_SHIFT); 559 seq_printf(m, "Max frequency: P%d\n", 560 (rgvmodectl & MEMMODE_FMAX_MASK) >> MEMMODE_FMAX_SHIFT); 561 seq_printf(m, "Min frequency: P%d\n", (rgvmodectl & MEMMODE_FMIN_MASK)); 562 563 return 0; 564 } 565 566 static int i915_fbc_status(struct seq_file *m, void *unused) 567 { 568 struct drm_info_node *node = (struct drm_info_node *) m->private; 569 struct drm_device *dev = node->minor->dev; 570 struct drm_crtc *crtc; 571 drm_i915_private_t *dev_priv = dev->dev_private; 572 bool fbc_enabled = false; 573 574 if (!dev_priv->display.fbc_enabled) { 575 seq_printf(m, "FBC unsupported on this chipset\n"); 576 return 0; 577 } 578 579 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 580 if (!crtc->enabled) 581 continue; 582 if (dev_priv->display.fbc_enabled(crtc)) 583 fbc_enabled = true; 584 } 585 586 if (fbc_enabled) { 587 seq_printf(m, "FBC enabled\n"); 588 } else { 589 seq_printf(m, "FBC disabled: "); 590 switch (dev_priv->no_fbc_reason) { 591 case FBC_STOLEN_TOO_SMALL: 592 seq_printf(m, "not enough stolen memory"); 593 break; 594 case FBC_UNSUPPORTED_MODE: 595 seq_printf(m, "mode not supported"); 596 break; 597 case FBC_MODE_TOO_LARGE: 598 seq_printf(m, "mode too large"); 599 break; 600 case FBC_BAD_PLANE: 601 seq_printf(m, "FBC unsupported on plane"); 602 break; 603 case FBC_NOT_TILED: 604 seq_printf(m, "scanout buffer not tiled"); 605 break; 606 default: 607 seq_printf(m, "unknown reason"); 608 } 609 seq_printf(m, "\n"); 610 } 611 return 0; 612 } 613 614 static int i915_sr_status(struct seq_file *m, void *unused) 615 { 616 struct drm_info_node *node = (struct drm_info_node *) m->private; 617 struct drm_device *dev = node->minor->dev; 618 drm_i915_private_t *dev_priv = dev->dev_private; 619 bool sr_enabled = false; 620 621 if (IS_I965G(dev) || IS_I945G(dev) || IS_I945GM(dev)) 622 sr_enabled = I915_READ(FW_BLC_SELF) & FW_BLC_SELF_EN; 623 else if (IS_I915GM(dev)) 624 sr_enabled = I915_READ(INSTPM) & INSTPM_SELF_EN; 625 else if (IS_PINEVIEW(dev)) 626 sr_enabled = I915_READ(DSPFW3) & PINEVIEW_SELF_REFRESH_EN; 627 628 seq_printf(m, "self-refresh: %s\n", sr_enabled ? "enabled" : 629 "disabled"); 630 631 return 0; 632 } 633 634 static int 635 i915_wedged_open(struct inode *inode, 636 struct file *filp) 637 { 638 filp->private_data = inode->i_private; 639 return 0; 640 } 641 642 static ssize_t 643 i915_wedged_read(struct file *filp, 644 char __user *ubuf, 645 size_t max, 646 loff_t *ppos) 647 { 648 struct drm_device *dev = filp->private_data; 649 drm_i915_private_t *dev_priv = dev->dev_private; 650 char buf[80]; 651 int len; 652 653 len = snprintf(buf, sizeof (buf), 654 "wedged : %d\n", 655 atomic_read(&dev_priv->mm.wedged)); 656 657 return simple_read_from_buffer(ubuf, max, ppos, buf, len); 658 } 659 660 static ssize_t 661 i915_wedged_write(struct file *filp, 662 const char __user *ubuf, 663 size_t cnt, 664 loff_t *ppos) 665 { 666 struct drm_device *dev = filp->private_data; 667 drm_i915_private_t *dev_priv = dev->dev_private; 668 char buf[20]; 669 int val = 1; 670 671 if (cnt > 0) { 672 if (cnt > sizeof (buf) - 1) 673 return -EINVAL; 674 675 if (copy_from_user(buf, ubuf, cnt)) 676 return -EFAULT; 677 buf[cnt] = 0; 678 679 val = simple_strtoul(buf, NULL, 0); 680 } 681 682 DRM_INFO("Manually setting wedged to %d\n", val); 683 684 atomic_set(&dev_priv->mm.wedged, val); 685 if (val) { 686 DRM_WAKEUP(&dev_priv->irq_queue); 687 queue_work(dev_priv->wq, &dev_priv->error_work); 688 } 689 690 return cnt; 691 } 692 693 static const struct file_operations i915_wedged_fops = { 694 .owner = THIS_MODULE, 695 .open = i915_wedged_open, 696 .read = i915_wedged_read, 697 .write = i915_wedged_write, 698 }; 699 700 /* As the drm_debugfs_init() routines are called before dev->dev_private is 701 * allocated we need to hook into the minor for release. */ 702 static int 703 drm_add_fake_info_node(struct drm_minor *minor, 704 struct dentry *ent, 705 const void *key) 706 { 707 struct drm_info_node *node; 708 709 node = kmalloc(sizeof(struct drm_info_node), GFP_KERNEL); 710 if (node == NULL) { 711 debugfs_remove(ent); 712 return -ENOMEM; 713 } 714 715 node->minor = minor; 716 node->dent = ent; 717 node->info_ent = (void *) key; 718 list_add(&node->list, &minor->debugfs_nodes.list); 719 720 return 0; 721 } 722 723 static int i915_wedged_create(struct dentry *root, struct drm_minor *minor) 724 { 725 struct drm_device *dev = minor->dev; 726 struct dentry *ent; 727 728 ent = debugfs_create_file("i915_wedged", 729 S_IRUGO | S_IWUSR, 730 root, dev, 731 &i915_wedged_fops); 732 if (IS_ERR(ent)) 733 return PTR_ERR(ent); 734 735 return drm_add_fake_info_node(minor, ent, &i915_wedged_fops); 736 } 737 738 static struct drm_info_list i915_debugfs_list[] = { 739 {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST}, 740 {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST}, 741 {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST}, 742 {"i915_gem_request", i915_gem_request_info, 0}, 743 {"i915_gem_seqno", i915_gem_seqno_info, 0}, 744 {"i915_gem_fence_regs", i915_gem_fence_regs_info, 0}, 745 {"i915_gem_interrupt", i915_interrupt_info, 0}, 746 {"i915_gem_hws", i915_hws_info, 0}, 747 {"i915_ringbuffer_data", i915_ringbuffer_data, 0}, 748 {"i915_ringbuffer_info", i915_ringbuffer_info, 0}, 749 {"i915_batchbuffers", i915_batchbuffer_info, 0}, 750 {"i915_error_state", i915_error_state, 0}, 751 {"i915_rstdby_delays", i915_rstdby_delays, 0}, 752 {"i915_cur_delayinfo", i915_cur_delayinfo, 0}, 753 {"i915_delayfreq_table", i915_delayfreq_table, 0}, 754 {"i915_inttoext_table", i915_inttoext_table, 0}, 755 {"i915_drpc_info", i915_drpc_info, 0}, 756 {"i915_fbc_status", i915_fbc_status, 0}, 757 {"i915_sr_status", i915_sr_status, 0}, 758 }; 759 #define I915_DEBUGFS_ENTRIES ARRAY_SIZE(i915_debugfs_list) 760 761 int i915_debugfs_init(struct drm_minor *minor) 762 { 763 int ret; 764 765 ret = i915_wedged_create(minor->debugfs_root, minor); 766 if (ret) 767 return ret; 768 769 return drm_debugfs_create_files(i915_debugfs_list, 770 I915_DEBUGFS_ENTRIES, 771 minor->debugfs_root, minor); 772 } 773 774 void i915_debugfs_cleanup(struct drm_minor *minor) 775 { 776 drm_debugfs_remove_files(i915_debugfs_list, 777 I915_DEBUGFS_ENTRIES, minor); 778 drm_debugfs_remove_files((struct drm_info_list *) &i915_wedged_fops, 779 1, minor); 780 } 781 782 #endif /* CONFIG_DEBUG_FS */ 783