xref: /linux/drivers/gpu/drm/i915/gvt/vgpu.c (revision e5c86679d5e864947a52fb31e45a425dea3e7fa9)
1 /*
2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Eddie Dong <eddie.dong@intel.com>
25  *    Kevin Tian <kevin.tian@intel.com>
26  *
27  * Contributors:
28  *    Ping Gao <ping.a.gao@intel.com>
29  *    Zhi Wang <zhi.a.wang@intel.com>
30  *    Bing Niu <bing.niu@intel.com>
31  *
32  */
33 
34 #include "i915_drv.h"
35 #include "gvt.h"
36 #include "i915_pvinfo.h"
37 
38 void populate_pvinfo_page(struct intel_vgpu *vgpu)
39 {
40 	/* setup the ballooning information */
41 	vgpu_vreg64(vgpu, vgtif_reg(magic)) = VGT_MAGIC;
42 	vgpu_vreg(vgpu, vgtif_reg(version_major)) = 1;
43 	vgpu_vreg(vgpu, vgtif_reg(version_minor)) = 0;
44 	vgpu_vreg(vgpu, vgtif_reg(display_ready)) = 0;
45 	vgpu_vreg(vgpu, vgtif_reg(vgt_id)) = vgpu->id;
46 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.base)) =
47 		vgpu_aperture_gmadr_base(vgpu);
48 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.mappable_gmadr.size)) =
49 		vgpu_aperture_sz(vgpu);
50 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.base)) =
51 		vgpu_hidden_gmadr_base(vgpu);
52 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.nonmappable_gmadr.size)) =
53 		vgpu_hidden_sz(vgpu);
54 
55 	vgpu_vreg(vgpu, vgtif_reg(avail_rs.fence_num)) = vgpu_fence_sz(vgpu);
56 
57 	gvt_dbg_core("Populate PVINFO PAGE for vGPU %d\n", vgpu->id);
58 	gvt_dbg_core("aperture base [GMADR] 0x%llx size 0x%llx\n",
59 		vgpu_aperture_gmadr_base(vgpu), vgpu_aperture_sz(vgpu));
60 	gvt_dbg_core("hidden base [GMADR] 0x%llx size=0x%llx\n",
61 		vgpu_hidden_gmadr_base(vgpu), vgpu_hidden_sz(vgpu));
62 	gvt_dbg_core("fence size %d\n", vgpu_fence_sz(vgpu));
63 
64 	WARN_ON(sizeof(struct vgt_if) != VGT_PVINFO_SIZE);
65 }
66 
67 static struct {
68 	unsigned int low_mm;
69 	unsigned int high_mm;
70 	unsigned int fence;
71 	enum intel_vgpu_edid edid;
72 	char *name;
73 } vgpu_types[] = {
74 /* Fixed vGPU type table */
75 	{ MB_TO_BYTES(64), MB_TO_BYTES(384), 4, GVT_EDID_1024_768, "8" },
76 	{ MB_TO_BYTES(128), MB_TO_BYTES(512), 4, GVT_EDID_1920_1200, "4" },
77 	{ MB_TO_BYTES(256), MB_TO_BYTES(1024), 4, GVT_EDID_1920_1200, "2" },
78 	{ MB_TO_BYTES(512), MB_TO_BYTES(2048), 4, GVT_EDID_1920_1200, "1" },
79 };
80 
81 /**
82  * intel_gvt_init_vgpu_types - initialize vGPU type list
83  * @gvt : GVT device
84  *
85  * Initialize vGPU type list based on available resource.
86  *
87  */
88 int intel_gvt_init_vgpu_types(struct intel_gvt *gvt)
89 {
90 	unsigned int num_types;
91 	unsigned int i, low_avail, high_avail;
92 	unsigned int min_low;
93 
94 	/* vGPU type name is defined as GVTg_Vx_y which contains
95 	 * physical GPU generation type (e.g V4 as BDW server, V5 as
96 	 * SKL server).
97 	 *
98 	 * Depend on physical SKU resource, might see vGPU types like
99 	 * GVTg_V4_8, GVTg_V4_4, GVTg_V4_2, etc. We can create
100 	 * different types of vGPU on same physical GPU depending on
101 	 * available resource. Each vGPU type will have "avail_instance"
102 	 * to indicate how many vGPU instance can be created for this
103 	 * type.
104 	 *
105 	 */
106 	low_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE;
107 	high_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE;
108 	num_types = sizeof(vgpu_types) / sizeof(vgpu_types[0]);
109 
110 	gvt->types = kzalloc(num_types * sizeof(struct intel_vgpu_type),
111 			     GFP_KERNEL);
112 	if (!gvt->types)
113 		return -ENOMEM;
114 
115 	min_low = MB_TO_BYTES(32);
116 	for (i = 0; i < num_types; ++i) {
117 		if (low_avail / vgpu_types[i].low_mm == 0)
118 			break;
119 
120 		gvt->types[i].low_gm_size = vgpu_types[i].low_mm;
121 		gvt->types[i].high_gm_size = vgpu_types[i].high_mm;
122 		gvt->types[i].fence = vgpu_types[i].fence;
123 		gvt->types[i].resolution = vgpu_types[i].edid;
124 		gvt->types[i].avail_instance = min(low_avail / vgpu_types[i].low_mm,
125 						   high_avail / vgpu_types[i].high_mm);
126 
127 		if (IS_GEN8(gvt->dev_priv))
128 			sprintf(gvt->types[i].name, "GVTg_V4_%s",
129 						vgpu_types[i].name);
130 		else if (IS_GEN9(gvt->dev_priv))
131 			sprintf(gvt->types[i].name, "GVTg_V5_%s",
132 						vgpu_types[i].name);
133 
134 		gvt_dbg_core("type[%d]: %s avail %u low %u high %u fence %u res %s\n",
135 			     i, gvt->types[i].name,
136 			     gvt->types[i].avail_instance,
137 			     gvt->types[i].low_gm_size,
138 			     gvt->types[i].high_gm_size, gvt->types[i].fence,
139 			     vgpu_edid_str(gvt->types[i].resolution));
140 	}
141 
142 	gvt->num_types = i;
143 	return 0;
144 }
145 
146 void intel_gvt_clean_vgpu_types(struct intel_gvt *gvt)
147 {
148 	kfree(gvt->types);
149 }
150 
151 static void intel_gvt_update_vgpu_types(struct intel_gvt *gvt)
152 {
153 	int i;
154 	unsigned int low_gm_avail, high_gm_avail, fence_avail;
155 	unsigned int low_gm_min, high_gm_min, fence_min;
156 
157 	/* Need to depend on maxium hw resource size but keep on
158 	 * static config for now.
159 	 */
160 	low_gm_avail = gvt_aperture_sz(gvt) - HOST_LOW_GM_SIZE -
161 		gvt->gm.vgpu_allocated_low_gm_size;
162 	high_gm_avail = gvt_hidden_sz(gvt) - HOST_HIGH_GM_SIZE -
163 		gvt->gm.vgpu_allocated_high_gm_size;
164 	fence_avail = gvt_fence_sz(gvt) - HOST_FENCE -
165 		gvt->fence.vgpu_allocated_fence_num;
166 
167 	for (i = 0; i < gvt->num_types; i++) {
168 		low_gm_min = low_gm_avail / gvt->types[i].low_gm_size;
169 		high_gm_min = high_gm_avail / gvt->types[i].high_gm_size;
170 		fence_min = fence_avail / gvt->types[i].fence;
171 		gvt->types[i].avail_instance = min(min(low_gm_min, high_gm_min),
172 						   fence_min);
173 
174 		gvt_dbg_core("update type[%d]: %s avail %u low %u high %u fence %u\n",
175 		       i, gvt->types[i].name,
176 		       gvt->types[i].avail_instance, gvt->types[i].low_gm_size,
177 		       gvt->types[i].high_gm_size, gvt->types[i].fence);
178 	}
179 }
180 
181 /**
182  * intel_gvt_active_vgpu - activate a virtual GPU
183  * @vgpu: virtual GPU
184  *
185  * This function is called when user wants to activate a virtual GPU.
186  *
187  */
188 void intel_gvt_activate_vgpu(struct intel_vgpu *vgpu)
189 {
190 	mutex_lock(&vgpu->gvt->lock);
191 	vgpu->active = true;
192 	mutex_unlock(&vgpu->gvt->lock);
193 }
194 
195 /**
196  * intel_gvt_deactive_vgpu - deactivate a virtual GPU
197  * @vgpu: virtual GPU
198  *
199  * This function is called when user wants to deactivate a virtual GPU.
200  * All virtual GPU runtime information will be destroyed.
201  *
202  */
203 void intel_gvt_deactivate_vgpu(struct intel_vgpu *vgpu)
204 {
205 	struct intel_gvt *gvt = vgpu->gvt;
206 
207 	mutex_lock(&gvt->lock);
208 
209 	vgpu->active = false;
210 
211 	if (atomic_read(&vgpu->running_workload_num)) {
212 		mutex_unlock(&gvt->lock);
213 		intel_gvt_wait_vgpu_idle(vgpu);
214 		mutex_lock(&gvt->lock);
215 	}
216 
217 	intel_vgpu_stop_schedule(vgpu);
218 
219 	mutex_unlock(&gvt->lock);
220 }
221 
222 /**
223  * intel_gvt_destroy_vgpu - destroy a virtual GPU
224  * @vgpu: virtual GPU
225  *
226  * This function is called when user wants to destroy a virtual GPU.
227  *
228  */
229 void intel_gvt_destroy_vgpu(struct intel_vgpu *vgpu)
230 {
231 	struct intel_gvt *gvt = vgpu->gvt;
232 
233 	mutex_lock(&gvt->lock);
234 
235 	WARN(vgpu->active, "vGPU is still active!\n");
236 
237 	idr_remove(&gvt->vgpu_idr, vgpu->id);
238 	intel_vgpu_clean_sched_policy(vgpu);
239 	intel_vgpu_clean_gvt_context(vgpu);
240 	intel_vgpu_clean_execlist(vgpu);
241 	intel_vgpu_clean_display(vgpu);
242 	intel_vgpu_clean_opregion(vgpu);
243 	intel_vgpu_clean_gtt(vgpu);
244 	intel_gvt_hypervisor_detach_vgpu(vgpu);
245 	intel_vgpu_free_resource(vgpu);
246 	intel_vgpu_clean_mmio(vgpu);
247 	vfree(vgpu);
248 
249 	intel_gvt_update_vgpu_types(gvt);
250 	mutex_unlock(&gvt->lock);
251 }
252 
253 static struct intel_vgpu *__intel_gvt_create_vgpu(struct intel_gvt *gvt,
254 		struct intel_vgpu_creation_params *param)
255 {
256 	struct intel_vgpu *vgpu;
257 	int ret;
258 
259 	gvt_dbg_core("handle %llu low %llu MB high %llu MB fence %llu\n",
260 			param->handle, param->low_gm_sz, param->high_gm_sz,
261 			param->fence_sz);
262 
263 	vgpu = vzalloc(sizeof(*vgpu));
264 	if (!vgpu)
265 		return ERR_PTR(-ENOMEM);
266 
267 	mutex_lock(&gvt->lock);
268 
269 	ret = idr_alloc(&gvt->vgpu_idr, vgpu, 1, GVT_MAX_VGPU, GFP_KERNEL);
270 	if (ret < 0)
271 		goto out_free_vgpu;
272 
273 	vgpu->id = ret;
274 	vgpu->handle = param->handle;
275 	vgpu->gvt = gvt;
276 	bitmap_zero(vgpu->tlb_handle_pending, I915_NUM_ENGINES);
277 
278 	intel_vgpu_init_cfg_space(vgpu, param->primary);
279 
280 	ret = intel_vgpu_init_mmio(vgpu);
281 	if (ret)
282 		goto out_clean_idr;
283 
284 	ret = intel_vgpu_alloc_resource(vgpu, param);
285 	if (ret)
286 		goto out_clean_vgpu_mmio;
287 
288 	populate_pvinfo_page(vgpu);
289 
290 	ret = intel_gvt_hypervisor_attach_vgpu(vgpu);
291 	if (ret)
292 		goto out_clean_vgpu_resource;
293 
294 	ret = intel_vgpu_init_gtt(vgpu);
295 	if (ret)
296 		goto out_detach_hypervisor_vgpu;
297 
298 	ret = intel_vgpu_init_display(vgpu, param->resolution);
299 	if (ret)
300 		goto out_clean_gtt;
301 
302 	ret = intel_vgpu_init_execlist(vgpu);
303 	if (ret)
304 		goto out_clean_display;
305 
306 	ret = intel_vgpu_init_gvt_context(vgpu);
307 	if (ret)
308 		goto out_clean_execlist;
309 
310 	ret = intel_vgpu_init_sched_policy(vgpu);
311 	if (ret)
312 		goto out_clean_shadow_ctx;
313 
314 	mutex_unlock(&gvt->lock);
315 
316 	return vgpu;
317 
318 out_clean_shadow_ctx:
319 	intel_vgpu_clean_gvt_context(vgpu);
320 out_clean_execlist:
321 	intel_vgpu_clean_execlist(vgpu);
322 out_clean_display:
323 	intel_vgpu_clean_display(vgpu);
324 out_clean_gtt:
325 	intel_vgpu_clean_gtt(vgpu);
326 out_detach_hypervisor_vgpu:
327 	intel_gvt_hypervisor_detach_vgpu(vgpu);
328 out_clean_vgpu_resource:
329 	intel_vgpu_free_resource(vgpu);
330 out_clean_vgpu_mmio:
331 	intel_vgpu_clean_mmio(vgpu);
332 out_clean_idr:
333 	idr_remove(&gvt->vgpu_idr, vgpu->id);
334 out_free_vgpu:
335 	vfree(vgpu);
336 	mutex_unlock(&gvt->lock);
337 	return ERR_PTR(ret);
338 }
339 
340 /**
341  * intel_gvt_create_vgpu - create a virtual GPU
342  * @gvt: GVT device
343  * @type: type of the vGPU to create
344  *
345  * This function is called when user wants to create a virtual GPU.
346  *
347  * Returns:
348  * pointer to intel_vgpu, error pointer if failed.
349  */
350 struct intel_vgpu *intel_gvt_create_vgpu(struct intel_gvt *gvt,
351 				struct intel_vgpu_type *type)
352 {
353 	struct intel_vgpu_creation_params param;
354 	struct intel_vgpu *vgpu;
355 
356 	param.handle = 0;
357 	param.primary = 1;
358 	param.low_gm_sz = type->low_gm_size;
359 	param.high_gm_sz = type->high_gm_size;
360 	param.fence_sz = type->fence;
361 	param.resolution = type->resolution;
362 
363 	/* XXX current param based on MB */
364 	param.low_gm_sz = BYTES_TO_MB(param.low_gm_sz);
365 	param.high_gm_sz = BYTES_TO_MB(param.high_gm_sz);
366 
367 	vgpu = __intel_gvt_create_vgpu(gvt, &param);
368 	if (IS_ERR(vgpu))
369 		return vgpu;
370 
371 	/* calculate left instance change for types */
372 	intel_gvt_update_vgpu_types(gvt);
373 
374 	return vgpu;
375 }
376 
377 /**
378  * intel_gvt_reset_vgpu_locked - reset a virtual GPU by DMLR or GT reset
379  * @vgpu: virtual GPU
380  * @dmlr: vGPU Device Model Level Reset or GT Reset
381  * @engine_mask: engines to reset for GT reset
382  *
383  * This function is called when user wants to reset a virtual GPU through
384  * device model reset or GT reset. The caller should hold the gvt lock.
385  *
386  * vGPU Device Model Level Reset (DMLR) simulates the PCI level reset to reset
387  * the whole vGPU to default state as when it is created. This vGPU function
388  * is required both for functionary and security concerns.The ultimate goal
389  * of vGPU FLR is that reuse a vGPU instance by virtual machines. When we
390  * assign a vGPU to a virtual machine we must isse such reset first.
391  *
392  * Full GT Reset and Per-Engine GT Reset are soft reset flow for GPU engines
393  * (Render, Blitter, Video, Video Enhancement). It is defined by GPU Spec.
394  * Unlike the FLR, GT reset only reset particular resource of a vGPU per
395  * the reset request. Guest driver can issue a GT reset by programming the
396  * virtual GDRST register to reset specific virtual GPU engine or all
397  * engines.
398  *
399  * The parameter dev_level is to identify if we will do DMLR or GT reset.
400  * The parameter engine_mask is to specific the engines that need to be
401  * resetted. If value ALL_ENGINES is given for engine_mask, it means
402  * the caller requests a full GT reset that we will reset all virtual
403  * GPU engines. For FLR, engine_mask is ignored.
404  */
405 void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
406 				 unsigned int engine_mask)
407 {
408 	struct intel_gvt *gvt = vgpu->gvt;
409 	struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
410 
411 	gvt_dbg_core("------------------------------------------\n");
412 	gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
413 		     vgpu->id, dmlr, engine_mask);
414 	vgpu->resetting = true;
415 
416 	intel_vgpu_stop_schedule(vgpu);
417 	/*
418 	 * The current_vgpu will set to NULL after stopping the
419 	 * scheduler when the reset is triggered by current vgpu.
420 	 */
421 	if (scheduler->current_vgpu == NULL) {
422 		mutex_unlock(&gvt->lock);
423 		intel_gvt_wait_vgpu_idle(vgpu);
424 		mutex_lock(&gvt->lock);
425 	}
426 
427 	intel_vgpu_reset_execlist(vgpu, dmlr ? ALL_ENGINES : engine_mask);
428 
429 	/* full GPU reset or device model level reset */
430 	if (engine_mask == ALL_ENGINES || dmlr) {
431 		intel_vgpu_reset_gtt(vgpu, dmlr);
432 		intel_vgpu_reset_resource(vgpu);
433 		intel_vgpu_reset_mmio(vgpu);
434 		populate_pvinfo_page(vgpu);
435 		intel_vgpu_reset_display(vgpu);
436 
437 		if (dmlr) {
438 			intel_vgpu_reset_cfg_space(vgpu);
439 			/* only reset the failsafe mode when dmlr reset */
440 			vgpu->failsafe = false;
441 			vgpu->pv_notified = false;
442 		}
443 	}
444 
445 	vgpu->resetting = false;
446 	gvt_dbg_core("reset vgpu%d done\n", vgpu->id);
447 	gvt_dbg_core("------------------------------------------\n");
448 }
449 
450 /**
451  * intel_gvt_reset_vgpu - reset a virtual GPU (Function Level)
452  * @vgpu: virtual GPU
453  *
454  * This function is called when user wants to reset a virtual GPU.
455  *
456  */
457 void intel_gvt_reset_vgpu(struct intel_vgpu *vgpu)
458 {
459 	mutex_lock(&vgpu->gvt->lock);
460 	intel_gvt_reset_vgpu_locked(vgpu, true, 0);
461 	mutex_unlock(&vgpu->gvt->lock);
462 }
463