xref: /linux/drivers/gpu/drm/i915/gvt/gtt.h (revision f3a8b6645dc2e60d11f20c1c23afd964ff4e55ae)
1 /*
2  * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice (including the next
12  * paragraph) shall be included in all copies or substantial portions of the
13  * Software.
14  *
15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Authors:
24  *    Zhi Wang <zhi.a.wang@intel.com>
25  *    Zhenyu Wang <zhenyuw@linux.intel.com>
26  *    Xiao Zheng <xiao.zheng@intel.com>
27  *
28  * Contributors:
29  *    Min He <min.he@intel.com>
30  *    Bing Niu <bing.niu@intel.com>
31  *
32  */
33 
34 #ifndef _GVT_GTT_H_
35 #define _GVT_GTT_H_
36 
37 #define GTT_PAGE_SHIFT		12
38 #define GTT_PAGE_SIZE		(1UL << GTT_PAGE_SHIFT)
39 #define GTT_PAGE_MASK		(~(GTT_PAGE_SIZE-1))
40 
41 struct intel_vgpu_mm;
42 
43 #define INTEL_GVT_GTT_HASH_BITS 8
44 #define INTEL_GVT_INVALID_ADDR (~0UL)
45 
46 struct intel_gvt_gtt_entry {
47 	u64 val64;
48 	int type;
49 };
50 
51 struct intel_gvt_gtt_pte_ops {
52 	struct intel_gvt_gtt_entry *(*get_entry)(void *pt,
53 		struct intel_gvt_gtt_entry *e,
54 		unsigned long index, bool hypervisor_access, unsigned long gpa,
55 		struct intel_vgpu *vgpu);
56 	struct intel_gvt_gtt_entry *(*set_entry)(void *pt,
57 		struct intel_gvt_gtt_entry *e,
58 		unsigned long index, bool hypervisor_access, unsigned long gpa,
59 		struct intel_vgpu *vgpu);
60 	bool (*test_present)(struct intel_gvt_gtt_entry *e);
61 	void (*clear_present)(struct intel_gvt_gtt_entry *e);
62 	bool (*test_pse)(struct intel_gvt_gtt_entry *e);
63 	void (*set_pfn)(struct intel_gvt_gtt_entry *e, unsigned long pfn);
64 	unsigned long (*get_pfn)(struct intel_gvt_gtt_entry *e);
65 };
66 
67 struct intel_gvt_gtt_gma_ops {
68 	unsigned long (*gma_to_ggtt_pte_index)(unsigned long gma);
69 	unsigned long (*gma_to_pte_index)(unsigned long gma);
70 	unsigned long (*gma_to_pde_index)(unsigned long gma);
71 	unsigned long (*gma_to_l3_pdp_index)(unsigned long gma);
72 	unsigned long (*gma_to_l4_pdp_index)(unsigned long gma);
73 	unsigned long (*gma_to_pml4_index)(unsigned long gma);
74 };
75 
76 struct intel_gvt_gtt {
77 	struct intel_gvt_gtt_pte_ops *pte_ops;
78 	struct intel_gvt_gtt_gma_ops *gma_ops;
79 	int (*mm_alloc_page_table)(struct intel_vgpu_mm *mm);
80 	void (*mm_free_page_table)(struct intel_vgpu_mm *mm);
81 	struct list_head oos_page_use_list_head;
82 	struct list_head oos_page_free_list_head;
83 	struct list_head mm_lru_list_head;
84 };
85 
86 enum {
87 	INTEL_GVT_MM_GGTT = 0,
88 	INTEL_GVT_MM_PPGTT,
89 };
90 
91 struct intel_vgpu_mm {
92 	int type;
93 	bool initialized;
94 	bool shadowed;
95 
96 	int page_table_entry_type;
97 	u32 page_table_entry_size;
98 	u32 page_table_entry_cnt;
99 	void *virtual_page_table;
100 	void *shadow_page_table;
101 
102 	int page_table_level;
103 	bool has_shadow_page_table;
104 	u32 pde_base_index;
105 
106 	struct list_head list;
107 	struct kref ref;
108 	atomic_t pincount;
109 	struct list_head lru_list;
110 	struct intel_vgpu *vgpu;
111 };
112 
113 extern struct intel_gvt_gtt_entry *intel_vgpu_mm_get_entry(
114 		struct intel_vgpu_mm *mm,
115 		void *page_table, struct intel_gvt_gtt_entry *e,
116 		unsigned long index);
117 
118 extern struct intel_gvt_gtt_entry *intel_vgpu_mm_set_entry(
119 		struct intel_vgpu_mm *mm,
120 		void *page_table, struct intel_gvt_gtt_entry *e,
121 		unsigned long index);
122 
123 #define ggtt_get_guest_entry(mm, e, index) \
124 	intel_vgpu_mm_get_entry(mm, mm->virtual_page_table, e, index)
125 
126 #define ggtt_set_guest_entry(mm, e, index) \
127 	intel_vgpu_mm_set_entry(mm, mm->virtual_page_table, e, index)
128 
129 #define ggtt_get_shadow_entry(mm, e, index) \
130 	intel_vgpu_mm_get_entry(mm, mm->shadow_page_table, e, index)
131 
132 #define ggtt_set_shadow_entry(mm, e, index) \
133 	intel_vgpu_mm_set_entry(mm, mm->shadow_page_table, e, index)
134 
135 #define ppgtt_get_guest_root_entry(mm, e, index) \
136 	intel_vgpu_mm_get_entry(mm, mm->virtual_page_table, e, index)
137 
138 #define ppgtt_set_guest_root_entry(mm, e, index) \
139 	intel_vgpu_mm_set_entry(mm, mm->virtual_page_table, e, index)
140 
141 #define ppgtt_get_shadow_root_entry(mm, e, index) \
142 	intel_vgpu_mm_get_entry(mm, mm->shadow_page_table, e, index)
143 
144 #define ppgtt_set_shadow_root_entry(mm, e, index) \
145 	intel_vgpu_mm_set_entry(mm, mm->shadow_page_table, e, index)
146 
147 extern struct intel_vgpu_mm *intel_vgpu_create_mm(struct intel_vgpu *vgpu,
148 		int mm_type, void *virtual_page_table, int page_table_level,
149 		u32 pde_base_index);
150 extern void intel_vgpu_destroy_mm(struct kref *mm_ref);
151 
152 struct intel_vgpu_guest_page;
153 
154 struct intel_vgpu_gtt {
155 	struct intel_vgpu_mm *ggtt_mm;
156 	unsigned long active_ppgtt_mm_bitmap;
157 	struct list_head mm_list_head;
158 	DECLARE_HASHTABLE(shadow_page_hash_table, INTEL_GVT_GTT_HASH_BITS);
159 	DECLARE_HASHTABLE(guest_page_hash_table, INTEL_GVT_GTT_HASH_BITS);
160 	atomic_t n_write_protected_guest_page;
161 	struct list_head oos_page_list_head;
162 	struct list_head post_shadow_list_head;
163 	struct page *scratch_page;
164 	unsigned long scratch_page_mfn;
165 };
166 
167 extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu);
168 extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu);
169 
170 extern int intel_gvt_init_gtt(struct intel_gvt *gvt);
171 extern void intel_gvt_clean_gtt(struct intel_gvt *gvt);
172 
173 extern struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu,
174 		int page_table_level, void *root_entry);
175 
176 struct intel_vgpu_oos_page;
177 
178 struct intel_vgpu_shadow_page {
179 	void *vaddr;
180 	struct page *page;
181 	int type;
182 	struct hlist_node node;
183 	unsigned long mfn;
184 };
185 
186 struct intel_vgpu_guest_page {
187 	struct hlist_node node;
188 	bool writeprotection;
189 	unsigned long gfn;
190 	int (*handler)(void *, u64, void *, int);
191 	void *data;
192 	unsigned long write_cnt;
193 	struct intel_vgpu_oos_page *oos_page;
194 };
195 
196 struct intel_vgpu_oos_page {
197 	struct intel_vgpu_guest_page *guest_page;
198 	struct list_head list;
199 	struct list_head vm_list;
200 	int id;
201 	unsigned char mem[GTT_PAGE_SIZE];
202 };
203 
204 #define GTT_ENTRY_NUM_IN_ONE_PAGE 512
205 
206 struct intel_vgpu_ppgtt_spt {
207 	struct intel_vgpu_shadow_page shadow_page;
208 	struct intel_vgpu_guest_page guest_page;
209 	int guest_page_type;
210 	atomic_t refcount;
211 	struct intel_vgpu *vgpu;
212 	DECLARE_BITMAP(post_shadow_bitmap, GTT_ENTRY_NUM_IN_ONE_PAGE);
213 	struct list_head post_shadow_list;
214 };
215 
216 int intel_vgpu_init_guest_page(struct intel_vgpu *vgpu,
217 		struct intel_vgpu_guest_page *guest_page,
218 		unsigned long gfn,
219 		int (*handler)(void *gp, u64, void *, int),
220 		void *data);
221 
222 void intel_vgpu_clean_guest_page(struct intel_vgpu *vgpu,
223 		struct intel_vgpu_guest_page *guest_page);
224 
225 int intel_vgpu_set_guest_page_writeprotection(struct intel_vgpu *vgpu,
226 		struct intel_vgpu_guest_page *guest_page);
227 
228 void intel_vgpu_clear_guest_page_writeprotection(struct intel_vgpu *vgpu,
229 		struct intel_vgpu_guest_page *guest_page);
230 
231 struct intel_vgpu_guest_page *intel_vgpu_find_guest_page(
232 		struct intel_vgpu *vgpu, unsigned long gfn);
233 
234 int intel_vgpu_sync_oos_pages(struct intel_vgpu *vgpu);
235 
236 int intel_vgpu_flush_post_shadow(struct intel_vgpu *vgpu);
237 
238 static inline void intel_gvt_mm_reference(struct intel_vgpu_mm *mm)
239 {
240 	kref_get(&mm->ref);
241 }
242 
243 static inline void intel_gvt_mm_unreference(struct intel_vgpu_mm *mm)
244 {
245 	kref_put(&mm->ref, intel_vgpu_destroy_mm);
246 }
247 
248 int intel_vgpu_pin_mm(struct intel_vgpu_mm *mm);
249 
250 void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm);
251 
252 unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm,
253 		unsigned long gma);
254 
255 struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu,
256 		int page_table_level, void *root_entry);
257 
258 int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu,
259 		int page_table_level);
260 
261 int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu,
262 		int page_table_level);
263 
264 int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu,
265 	unsigned int off, void *p_data, unsigned int bytes);
266 
267 int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu,
268 	unsigned int off, void *p_data, unsigned int bytes);
269 
270 #endif /* _GVT_GTT_H_ */
271