1 /* 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Zhi Wang <zhi.a.wang@intel.com> 25 * Zhenyu Wang <zhenyuw@linux.intel.com> 26 * Xiao Zheng <xiao.zheng@intel.com> 27 * 28 * Contributors: 29 * Min He <min.he@intel.com> 30 * Bing Niu <bing.niu@intel.com> 31 * 32 */ 33 34 #ifndef _GVT_GTT_H_ 35 #define _GVT_GTT_H_ 36 37 #define GTT_PAGE_SHIFT 12 38 #define GTT_PAGE_SIZE (1UL << GTT_PAGE_SHIFT) 39 #define GTT_PAGE_MASK (~(GTT_PAGE_SIZE-1)) 40 41 struct intel_vgpu_mm; 42 43 #define INTEL_GVT_GTT_HASH_BITS 8 44 #define INTEL_GVT_INVALID_ADDR (~0UL) 45 46 struct intel_gvt_gtt_entry { 47 u64 val64; 48 int type; 49 }; 50 51 struct intel_gvt_gtt_pte_ops { 52 struct intel_gvt_gtt_entry *(*get_entry)(void *pt, 53 struct intel_gvt_gtt_entry *e, 54 unsigned long index, bool hypervisor_access, unsigned long gpa, 55 struct intel_vgpu *vgpu); 56 struct intel_gvt_gtt_entry *(*set_entry)(void *pt, 57 struct intel_gvt_gtt_entry *e, 58 unsigned long index, bool hypervisor_access, unsigned long gpa, 59 struct intel_vgpu *vgpu); 60 bool (*test_present)(struct intel_gvt_gtt_entry *e); 61 void (*clear_present)(struct intel_gvt_gtt_entry *e); 62 bool (*test_pse)(struct intel_gvt_gtt_entry *e); 63 void (*set_pfn)(struct intel_gvt_gtt_entry *e, unsigned long pfn); 64 unsigned long (*get_pfn)(struct intel_gvt_gtt_entry *e); 65 }; 66 67 struct intel_gvt_gtt_gma_ops { 68 unsigned long (*gma_to_ggtt_pte_index)(unsigned long gma); 69 unsigned long (*gma_to_pte_index)(unsigned long gma); 70 unsigned long (*gma_to_pde_index)(unsigned long gma); 71 unsigned long (*gma_to_l3_pdp_index)(unsigned long gma); 72 unsigned long (*gma_to_l4_pdp_index)(unsigned long gma); 73 unsigned long (*gma_to_pml4_index)(unsigned long gma); 74 }; 75 76 struct intel_gvt_gtt { 77 struct intel_gvt_gtt_pte_ops *pte_ops; 78 struct intel_gvt_gtt_gma_ops *gma_ops; 79 int (*mm_alloc_page_table)(struct intel_vgpu_mm *mm); 80 void (*mm_free_page_table)(struct intel_vgpu_mm *mm); 81 struct list_head oos_page_use_list_head; 82 struct list_head oos_page_free_list_head; 83 struct list_head mm_lru_list_head; 84 }; 85 86 enum { 87 INTEL_GVT_MM_GGTT = 0, 88 INTEL_GVT_MM_PPGTT, 89 }; 90 91 typedef enum { 92 GTT_TYPE_INVALID = -1, 93 94 GTT_TYPE_GGTT_PTE, 95 96 GTT_TYPE_PPGTT_PTE_4K_ENTRY, 97 GTT_TYPE_PPGTT_PTE_2M_ENTRY, 98 GTT_TYPE_PPGTT_PTE_1G_ENTRY, 99 100 GTT_TYPE_PPGTT_PTE_ENTRY, 101 102 GTT_TYPE_PPGTT_PDE_ENTRY, 103 GTT_TYPE_PPGTT_PDP_ENTRY, 104 GTT_TYPE_PPGTT_PML4_ENTRY, 105 106 GTT_TYPE_PPGTT_ROOT_ENTRY, 107 108 GTT_TYPE_PPGTT_ROOT_L3_ENTRY, 109 GTT_TYPE_PPGTT_ROOT_L4_ENTRY, 110 111 GTT_TYPE_PPGTT_ENTRY, 112 113 GTT_TYPE_PPGTT_PTE_PT, 114 GTT_TYPE_PPGTT_PDE_PT, 115 GTT_TYPE_PPGTT_PDP_PT, 116 GTT_TYPE_PPGTT_PML4_PT, 117 118 GTT_TYPE_MAX, 119 } intel_gvt_gtt_type_t; 120 121 struct intel_vgpu_mm { 122 int type; 123 bool initialized; 124 bool shadowed; 125 126 int page_table_entry_type; 127 u32 page_table_entry_size; 128 u32 page_table_entry_cnt; 129 void *virtual_page_table; 130 void *shadow_page_table; 131 132 int page_table_level; 133 bool has_shadow_page_table; 134 u32 pde_base_index; 135 136 struct list_head list; 137 struct kref ref; 138 atomic_t pincount; 139 struct list_head lru_list; 140 struct intel_vgpu *vgpu; 141 }; 142 143 extern struct intel_gvt_gtt_entry *intel_vgpu_mm_get_entry( 144 struct intel_vgpu_mm *mm, 145 void *page_table, struct intel_gvt_gtt_entry *e, 146 unsigned long index); 147 148 extern struct intel_gvt_gtt_entry *intel_vgpu_mm_set_entry( 149 struct intel_vgpu_mm *mm, 150 void *page_table, struct intel_gvt_gtt_entry *e, 151 unsigned long index); 152 153 #define ggtt_get_guest_entry(mm, e, index) \ 154 intel_vgpu_mm_get_entry(mm, mm->virtual_page_table, e, index) 155 156 #define ggtt_set_guest_entry(mm, e, index) \ 157 intel_vgpu_mm_set_entry(mm, mm->virtual_page_table, e, index) 158 159 #define ggtt_get_shadow_entry(mm, e, index) \ 160 intel_vgpu_mm_get_entry(mm, mm->shadow_page_table, e, index) 161 162 #define ggtt_set_shadow_entry(mm, e, index) \ 163 intel_vgpu_mm_set_entry(mm, mm->shadow_page_table, e, index) 164 165 #define ppgtt_get_guest_root_entry(mm, e, index) \ 166 intel_vgpu_mm_get_entry(mm, mm->virtual_page_table, e, index) 167 168 #define ppgtt_set_guest_root_entry(mm, e, index) \ 169 intel_vgpu_mm_set_entry(mm, mm->virtual_page_table, e, index) 170 171 #define ppgtt_get_shadow_root_entry(mm, e, index) \ 172 intel_vgpu_mm_get_entry(mm, mm->shadow_page_table, e, index) 173 174 #define ppgtt_set_shadow_root_entry(mm, e, index) \ 175 intel_vgpu_mm_set_entry(mm, mm->shadow_page_table, e, index) 176 177 extern struct intel_vgpu_mm *intel_vgpu_create_mm(struct intel_vgpu *vgpu, 178 int mm_type, void *virtual_page_table, int page_table_level, 179 u32 pde_base_index); 180 extern void intel_vgpu_destroy_mm(struct kref *mm_ref); 181 182 struct intel_vgpu_guest_page; 183 184 struct intel_vgpu_scratch_pt { 185 struct page *page; 186 unsigned long page_mfn; 187 }; 188 189 190 struct intel_vgpu_gtt { 191 struct intel_vgpu_mm *ggtt_mm; 192 unsigned long active_ppgtt_mm_bitmap; 193 struct list_head mm_list_head; 194 DECLARE_HASHTABLE(shadow_page_hash_table, INTEL_GVT_GTT_HASH_BITS); 195 DECLARE_HASHTABLE(guest_page_hash_table, INTEL_GVT_GTT_HASH_BITS); 196 atomic_t n_write_protected_guest_page; 197 struct list_head oos_page_list_head; 198 struct list_head post_shadow_list_head; 199 struct intel_vgpu_scratch_pt scratch_pt[GTT_TYPE_MAX]; 200 201 }; 202 203 extern int intel_vgpu_init_gtt(struct intel_vgpu *vgpu); 204 extern void intel_vgpu_clean_gtt(struct intel_vgpu *vgpu); 205 206 extern int intel_gvt_init_gtt(struct intel_gvt *gvt); 207 extern void intel_gvt_clean_gtt(struct intel_gvt *gvt); 208 209 extern struct intel_vgpu_mm *intel_gvt_find_ppgtt_mm(struct intel_vgpu *vgpu, 210 int page_table_level, void *root_entry); 211 212 struct intel_vgpu_oos_page; 213 214 struct intel_vgpu_shadow_page { 215 void *vaddr; 216 struct page *page; 217 int type; 218 struct hlist_node node; 219 unsigned long mfn; 220 }; 221 222 struct intel_vgpu_guest_page { 223 struct hlist_node node; 224 bool writeprotection; 225 unsigned long gfn; 226 int (*handler)(void *, u64, void *, int); 227 void *data; 228 unsigned long write_cnt; 229 struct intel_vgpu_oos_page *oos_page; 230 }; 231 232 struct intel_vgpu_oos_page { 233 struct intel_vgpu_guest_page *guest_page; 234 struct list_head list; 235 struct list_head vm_list; 236 int id; 237 unsigned char mem[GTT_PAGE_SIZE]; 238 }; 239 240 #define GTT_ENTRY_NUM_IN_ONE_PAGE 512 241 242 struct intel_vgpu_ppgtt_spt { 243 struct intel_vgpu_shadow_page shadow_page; 244 struct intel_vgpu_guest_page guest_page; 245 int guest_page_type; 246 atomic_t refcount; 247 struct intel_vgpu *vgpu; 248 DECLARE_BITMAP(post_shadow_bitmap, GTT_ENTRY_NUM_IN_ONE_PAGE); 249 struct list_head post_shadow_list; 250 }; 251 252 int intel_vgpu_init_guest_page(struct intel_vgpu *vgpu, 253 struct intel_vgpu_guest_page *guest_page, 254 unsigned long gfn, 255 int (*handler)(void *gp, u64, void *, int), 256 void *data); 257 258 void intel_vgpu_clean_guest_page(struct intel_vgpu *vgpu, 259 struct intel_vgpu_guest_page *guest_page); 260 261 int intel_vgpu_set_guest_page_writeprotection(struct intel_vgpu *vgpu, 262 struct intel_vgpu_guest_page *guest_page); 263 264 void intel_vgpu_clear_guest_page_writeprotection(struct intel_vgpu *vgpu, 265 struct intel_vgpu_guest_page *guest_page); 266 267 struct intel_vgpu_guest_page *intel_vgpu_find_guest_page( 268 struct intel_vgpu *vgpu, unsigned long gfn); 269 270 int intel_vgpu_sync_oos_pages(struct intel_vgpu *vgpu); 271 272 int intel_vgpu_flush_post_shadow(struct intel_vgpu *vgpu); 273 274 static inline void intel_gvt_mm_reference(struct intel_vgpu_mm *mm) 275 { 276 kref_get(&mm->ref); 277 } 278 279 static inline void intel_gvt_mm_unreference(struct intel_vgpu_mm *mm) 280 { 281 kref_put(&mm->ref, intel_vgpu_destroy_mm); 282 } 283 284 int intel_vgpu_pin_mm(struct intel_vgpu_mm *mm); 285 286 void intel_vgpu_unpin_mm(struct intel_vgpu_mm *mm); 287 288 unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, 289 unsigned long gma); 290 291 struct intel_vgpu_mm *intel_vgpu_find_ppgtt_mm(struct intel_vgpu *vgpu, 292 int page_table_level, void *root_entry); 293 294 int intel_vgpu_g2v_create_ppgtt_mm(struct intel_vgpu *vgpu, 295 int page_table_level); 296 297 int intel_vgpu_g2v_destroy_ppgtt_mm(struct intel_vgpu *vgpu, 298 int page_table_level); 299 300 int intel_vgpu_emulate_gtt_mmio_read(struct intel_vgpu *vgpu, 301 unsigned int off, void *p_data, unsigned int bytes); 302 303 int intel_vgpu_emulate_gtt_mmio_write(struct intel_vgpu *vgpu, 304 unsigned int off, void *p_data, unsigned int bytes); 305 306 #endif /* _GVT_GTT_H_ */ 307