1 /* 2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Zhi Wang <zhi.a.wang@intel.com> 25 * 26 * Contributors: 27 * Changbin Du <changbin.du@intel.com> 28 * 29 */ 30 31 #include <linux/firmware.h> 32 #include <linux/crc32.h> 33 #include <linux/vmalloc.h> 34 35 #include "i915_drv.h" 36 #include "gvt.h" 37 #include "i915_pvinfo.h" 38 39 #define FIRMWARE_VERSION (0x0) 40 41 struct gvt_firmware_header { 42 u64 magic; 43 u32 crc32; /* protect the data after this field */ 44 u32 version; 45 u64 cfg_space_size; 46 u64 cfg_space_offset; /* offset in the file */ 47 u64 mmio_size; 48 u64 mmio_offset; /* offset in the file */ 49 unsigned char data[]; 50 }; 51 52 #define dev_to_drm_minor(d) dev_get_drvdata((d)) 53 54 static ssize_t 55 gvt_firmware_read(struct file *filp, struct kobject *kobj, 56 struct bin_attribute *attr, char *buf, 57 loff_t offset, size_t count) 58 { 59 memcpy(buf, attr->private + offset, count); 60 return count; 61 } 62 63 static struct bin_attribute firmware_attr = { 64 .attr = {.name = "gvt_firmware", .mode = (S_IRUSR)}, 65 .read = gvt_firmware_read, 66 .write = NULL, 67 .mmap = NULL, 68 }; 69 70 static int expose_firmware_sysfs(struct intel_gvt *gvt) 71 { 72 struct intel_gvt_device_info *info = &gvt->device_info; 73 struct drm_i915_private *i915 = gvt->gt->i915; 74 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); 75 struct gvt_firmware_header *h; 76 void *firmware; 77 void *p; 78 unsigned long size, crc32_start; 79 int ret; 80 81 size = offsetof(struct gvt_firmware_header, data) + info->mmio_size + info->cfg_space_size; 82 firmware = vzalloc(size); 83 if (!firmware) 84 return -ENOMEM; 85 86 h = firmware; 87 88 h->magic = VGT_MAGIC; 89 h->version = FIRMWARE_VERSION; 90 h->cfg_space_size = info->cfg_space_size; 91 h->cfg_space_offset = offsetof(struct gvt_firmware_header, data); 92 h->mmio_size = info->mmio_size; 93 h->mmio_offset = h->cfg_space_offset + h->cfg_space_size; 94 95 p = firmware + h->cfg_space_offset; 96 97 memcpy(gvt->firmware.cfg_space, i915->vgpu.initial_cfg_space, 98 info->cfg_space_size); 99 memcpy(p, gvt->firmware.cfg_space, info->cfg_space_size); 100 101 p = firmware + h->mmio_offset; 102 103 memcpy(gvt->firmware.mmio, i915->vgpu.initial_mmio, 104 info->mmio_size); 105 106 memcpy(p, gvt->firmware.mmio, info->mmio_size); 107 108 crc32_start = offsetof(struct gvt_firmware_header, version); 109 h->crc32 = crc32_le(0, firmware + crc32_start, size - crc32_start); 110 111 firmware_attr.size = size; 112 firmware_attr.private = firmware; 113 114 ret = device_create_bin_file(&pdev->dev, &firmware_attr); 115 if (ret) { 116 vfree(firmware); 117 return ret; 118 } 119 return 0; 120 } 121 122 static void clean_firmware_sysfs(struct intel_gvt *gvt) 123 { 124 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev); 125 126 device_remove_bin_file(&pdev->dev, &firmware_attr); 127 vfree(firmware_attr.private); 128 } 129 130 /** 131 * intel_gvt_free_firmware - free GVT firmware 132 * @gvt: intel gvt device 133 * 134 */ 135 void intel_gvt_free_firmware(struct intel_gvt *gvt) 136 { 137 if (!gvt->firmware.firmware_loaded) 138 clean_firmware_sysfs(gvt); 139 140 kfree(gvt->firmware.cfg_space); 141 vfree(gvt->firmware.mmio); 142 } 143 144 static int verify_firmware(struct intel_gvt *gvt, 145 const struct firmware *fw) 146 { 147 struct intel_gvt_device_info *info = &gvt->device_info; 148 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev); 149 struct gvt_firmware_header *h; 150 unsigned long id, crc32_start; 151 const void *mem; 152 const char *item; 153 u64 file, request; 154 155 h = (struct gvt_firmware_header *)fw->data; 156 157 crc32_start = offsetofend(struct gvt_firmware_header, crc32); 158 mem = fw->data + crc32_start; 159 160 #define VERIFY(s, a, b) do { \ 161 item = (s); file = (u64)(a); request = (u64)(b); \ 162 if ((a) != (b)) \ 163 goto invalid_firmware; \ 164 } while (0) 165 166 VERIFY("magic number", h->magic, VGT_MAGIC); 167 VERIFY("version", h->version, FIRMWARE_VERSION); 168 VERIFY("crc32", h->crc32, crc32_le(0, mem, fw->size - crc32_start)); 169 VERIFY("cfg space size", h->cfg_space_size, info->cfg_space_size); 170 VERIFY("mmio size", h->mmio_size, info->mmio_size); 171 172 mem = (fw->data + h->cfg_space_offset); 173 174 id = *(u16 *)(mem + PCI_VENDOR_ID); 175 VERIFY("vendor id", id, pdev->vendor); 176 177 id = *(u16 *)(mem + PCI_DEVICE_ID); 178 VERIFY("device id", id, pdev->device); 179 180 id = *(u8 *)(mem + PCI_REVISION_ID); 181 VERIFY("revision id", id, pdev->revision); 182 183 #undef VERIFY 184 return 0; 185 186 invalid_firmware: 187 gvt_dbg_core("Invalid firmware: %s [file] 0x%llx [request] 0x%llx\n", 188 item, file, request); 189 return -EINVAL; 190 } 191 192 #define GVT_FIRMWARE_PATH "i915/gvt" 193 194 /** 195 * intel_gvt_load_firmware - load GVT firmware 196 * @gvt: intel gvt device 197 * 198 */ 199 int intel_gvt_load_firmware(struct intel_gvt *gvt) 200 { 201 struct intel_gvt_device_info *info = &gvt->device_info; 202 struct pci_dev *pdev = to_pci_dev(gvt->gt->i915->drm.dev); 203 struct intel_gvt_firmware *firmware = &gvt->firmware; 204 struct gvt_firmware_header *h; 205 const struct firmware *fw; 206 char *path; 207 void *mem; 208 int ret; 209 210 path = kmalloc(PATH_MAX, GFP_KERNEL); 211 if (!path) 212 return -ENOMEM; 213 214 mem = kmalloc(info->cfg_space_size, GFP_KERNEL); 215 if (!mem) { 216 kfree(path); 217 return -ENOMEM; 218 } 219 220 firmware->cfg_space = mem; 221 222 mem = vmalloc(info->mmio_size); 223 if (!mem) { 224 kfree(path); 225 kfree(firmware->cfg_space); 226 return -ENOMEM; 227 } 228 229 firmware->mmio = mem; 230 231 sprintf(path, "%s/vid_0x%04x_did_0x%04x_rid_0x%02x.golden_hw_state", 232 GVT_FIRMWARE_PATH, pdev->vendor, pdev->device, 233 pdev->revision); 234 235 gvt_dbg_core("request hw state firmware %s...\n", path); 236 237 ret = request_firmware(&fw, path, gvt->gt->i915->drm.dev); 238 kfree(path); 239 240 if (ret) 241 goto expose_firmware; 242 243 gvt_dbg_core("success.\n"); 244 245 ret = verify_firmware(gvt, fw); 246 if (ret) 247 goto out_free_fw; 248 249 gvt_dbg_core("verified.\n"); 250 251 h = (struct gvt_firmware_header *)fw->data; 252 253 memcpy(firmware->cfg_space, fw->data + h->cfg_space_offset, 254 h->cfg_space_size); 255 memcpy(firmware->mmio, fw->data + h->mmio_offset, 256 h->mmio_size); 257 258 release_firmware(fw); 259 firmware->firmware_loaded = true; 260 return 0; 261 262 out_free_fw: 263 release_firmware(fw); 264 expose_firmware: 265 expose_firmware_sysfs(gvt); 266 return 0; 267 } 268