1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016-2019 Intel Corporation 4 */ 5 6 #include <linux/bitfield.h> 7 #include <linux/firmware.h> 8 #include <drm/drm_print.h> 9 10 #include "intel_uc_fw.h" 11 #include "intel_uc_fw_abi.h" 12 #include "i915_drv.h" 13 14 #ifdef CONFIG_DRM_I915_DEBUG_GUC 15 static inline struct intel_gt *__uc_fw_to_gt(struct intel_uc_fw *uc_fw) 16 { 17 GEM_BUG_ON(uc_fw->status == INTEL_UC_FIRMWARE_UNINITIALIZED); 18 if (uc_fw->type == INTEL_UC_FW_TYPE_GUC) 19 return container_of(uc_fw, struct intel_gt, uc.guc.fw); 20 21 GEM_BUG_ON(uc_fw->type != INTEL_UC_FW_TYPE_HUC); 22 return container_of(uc_fw, struct intel_gt, uc.huc.fw); 23 } 24 25 void intel_uc_fw_change_status(struct intel_uc_fw *uc_fw, 26 enum intel_uc_fw_status status) 27 { 28 uc_fw->__status = status; 29 DRM_DEV_DEBUG_DRIVER(__uc_fw_to_gt(uc_fw)->i915->drm.dev, 30 "%s firmware -> %s\n", 31 intel_uc_fw_type_repr(uc_fw->type), 32 status == INTEL_UC_FIRMWARE_SELECTED ? 33 uc_fw->path : intel_uc_fw_status_repr(status)); 34 } 35 #endif 36 37 /* 38 * List of required GuC and HuC binaries per-platform. 39 * Must be ordered based on platform + revid, from newer to older. 40 */ 41 #define INTEL_UC_FIRMWARE_DEFS(fw_def, guc_def, huc_def) \ 42 fw_def(ELKHARTLAKE, 0, guc_def(ehl, 33, 0, 4), huc_def(ehl, 9, 0, 0)) \ 43 fw_def(ICELAKE, 0, guc_def(icl, 33, 0, 0), huc_def(icl, 9, 0, 0)) \ 44 fw_def(COFFEELAKE, 5, guc_def(cml, 33, 0, 0), huc_def(cml, 4, 0, 0)) \ 45 fw_def(COFFEELAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \ 46 fw_def(GEMINILAKE, 0, guc_def(glk, 33, 0, 0), huc_def(glk, 4, 0, 0)) \ 47 fw_def(KABYLAKE, 0, guc_def(kbl, 33, 0, 0), huc_def(kbl, 4, 0, 0)) \ 48 fw_def(BROXTON, 0, guc_def(bxt, 33, 0, 0), huc_def(bxt, 2, 0, 0)) \ 49 fw_def(SKYLAKE, 0, guc_def(skl, 33, 0, 0), huc_def(skl, 2, 0, 0)) 50 51 #define __MAKE_UC_FW_PATH(prefix_, name_, major_, minor_, patch_) \ 52 "i915/" \ 53 __stringify(prefix_) name_ \ 54 __stringify(major_) "." \ 55 __stringify(minor_) "." \ 56 __stringify(patch_) ".bin" 57 58 #define MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_) \ 59 __MAKE_UC_FW_PATH(prefix_, "_guc_", major_, minor_, patch_) 60 61 #define MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_) \ 62 __MAKE_UC_FW_PATH(prefix_, "_huc_", major_, minor_, bld_num_) 63 64 /* All blobs need to be declared via MODULE_FIRMWARE() */ 65 #define INTEL_UC_MODULE_FW(platform_, revid_, guc_, huc_) \ 66 MODULE_FIRMWARE(guc_); \ 67 MODULE_FIRMWARE(huc_); 68 69 INTEL_UC_FIRMWARE_DEFS(INTEL_UC_MODULE_FW, MAKE_GUC_FW_PATH, MAKE_HUC_FW_PATH) 70 71 /* The below structs and macros are used to iterate across the list of blobs */ 72 struct __packed uc_fw_blob { 73 u8 major; 74 u8 minor; 75 const char *path; 76 }; 77 78 #define UC_FW_BLOB(major_, minor_, path_) \ 79 { .major = major_, .minor = minor_, .path = path_ } 80 81 #define GUC_FW_BLOB(prefix_, major_, minor_, patch_) \ 82 UC_FW_BLOB(major_, minor_, \ 83 MAKE_GUC_FW_PATH(prefix_, major_, minor_, patch_)) 84 85 #define HUC_FW_BLOB(prefix_, major_, minor_, bld_num_) \ 86 UC_FW_BLOB(major_, minor_, \ 87 MAKE_HUC_FW_PATH(prefix_, major_, minor_, bld_num_)) 88 89 struct __packed uc_fw_platform_requirement { 90 enum intel_platform p; 91 u8 rev; /* first platform rev using this FW */ 92 const struct uc_fw_blob blobs[INTEL_UC_FW_NUM_TYPES]; 93 }; 94 95 #define MAKE_FW_LIST(platform_, revid_, guc_, huc_) \ 96 { \ 97 .p = INTEL_##platform_, \ 98 .rev = revid_, \ 99 .blobs[INTEL_UC_FW_TYPE_GUC] = guc_, \ 100 .blobs[INTEL_UC_FW_TYPE_HUC] = huc_, \ 101 }, 102 103 static void 104 __uc_fw_auto_select(struct intel_uc_fw *uc_fw, enum intel_platform p, u8 rev) 105 { 106 static const struct uc_fw_platform_requirement fw_blobs[] = { 107 INTEL_UC_FIRMWARE_DEFS(MAKE_FW_LIST, GUC_FW_BLOB, HUC_FW_BLOB) 108 }; 109 int i; 110 111 for (i = 0; i < ARRAY_SIZE(fw_blobs) && p <= fw_blobs[i].p; i++) { 112 if (p == fw_blobs[i].p && rev >= fw_blobs[i].rev) { 113 const struct uc_fw_blob *blob = 114 &fw_blobs[i].blobs[uc_fw->type]; 115 uc_fw->path = blob->path; 116 uc_fw->major_ver_wanted = blob->major; 117 uc_fw->minor_ver_wanted = blob->minor; 118 break; 119 } 120 } 121 122 /* make sure the list is ordered as expected */ 123 if (IS_ENABLED(CONFIG_DRM_I915_SELFTEST)) { 124 for (i = 1; i < ARRAY_SIZE(fw_blobs); i++) { 125 if (fw_blobs[i].p < fw_blobs[i - 1].p) 126 continue; 127 128 if (fw_blobs[i].p == fw_blobs[i - 1].p && 129 fw_blobs[i].rev < fw_blobs[i - 1].rev) 130 continue; 131 132 pr_err("invalid FW blob order: %s r%u comes before %s r%u\n", 133 intel_platform_name(fw_blobs[i - 1].p), 134 fw_blobs[i - 1].rev, 135 intel_platform_name(fw_blobs[i].p), 136 fw_blobs[i].rev); 137 138 uc_fw->path = NULL; 139 } 140 } 141 142 /* We don't want to enable GuC/HuC on pre-Gen11 by default */ 143 if (i915_modparams.enable_guc == -1 && p < INTEL_ICELAKE) 144 uc_fw->path = NULL; 145 } 146 147 static const char *__override_guc_firmware_path(void) 148 { 149 if (i915_modparams.enable_guc & (ENABLE_GUC_SUBMISSION | 150 ENABLE_GUC_LOAD_HUC)) 151 return i915_modparams.guc_firmware_path; 152 return ""; 153 } 154 155 static const char *__override_huc_firmware_path(void) 156 { 157 if (i915_modparams.enable_guc & ENABLE_GUC_LOAD_HUC) 158 return i915_modparams.huc_firmware_path; 159 return ""; 160 } 161 162 static void __uc_fw_user_override(struct intel_uc_fw *uc_fw) 163 { 164 const char *path = NULL; 165 166 switch (uc_fw->type) { 167 case INTEL_UC_FW_TYPE_GUC: 168 path = __override_guc_firmware_path(); 169 break; 170 case INTEL_UC_FW_TYPE_HUC: 171 path = __override_huc_firmware_path(); 172 break; 173 } 174 175 if (unlikely(path)) { 176 uc_fw->path = path; 177 uc_fw->user_overridden = true; 178 } 179 } 180 181 /** 182 * intel_uc_fw_init_early - initialize the uC object and select the firmware 183 * @uc_fw: uC firmware 184 * @type: type of uC 185 * @supported: is uC support possible 186 * @platform: platform identifier 187 * @rev: hardware revision 188 * 189 * Initialize the state of our uC object and relevant tracking and select the 190 * firmware to fetch and load. 191 */ 192 void intel_uc_fw_init_early(struct intel_uc_fw *uc_fw, 193 enum intel_uc_fw_type type, bool supported, 194 enum intel_platform platform, u8 rev) 195 { 196 /* 197 * we use FIRMWARE_UNINITIALIZED to detect checks against uc_fw->status 198 * before we're looked at the HW caps to see if we have uc support 199 */ 200 BUILD_BUG_ON(INTEL_UC_FIRMWARE_UNINITIALIZED); 201 GEM_BUG_ON(uc_fw->status); 202 GEM_BUG_ON(uc_fw->path); 203 204 uc_fw->type = type; 205 206 if (supported) { 207 __uc_fw_auto_select(uc_fw, platform, rev); 208 __uc_fw_user_override(uc_fw); 209 } 210 211 intel_uc_fw_change_status(uc_fw, uc_fw->path ? *uc_fw->path ? 212 INTEL_UC_FIRMWARE_SELECTED : 213 INTEL_UC_FIRMWARE_DISABLED : 214 INTEL_UC_FIRMWARE_NOT_SUPPORTED); 215 } 216 217 static void __force_fw_fetch_failures(struct intel_uc_fw *uc_fw, 218 struct drm_i915_private *i915, 219 int e) 220 { 221 bool user = e == -EINVAL; 222 223 if (i915_inject_load_error(i915, e)) { 224 /* non-existing blob */ 225 uc_fw->path = "<invalid>"; 226 uc_fw->user_overridden = user; 227 } else if (i915_inject_load_error(i915, e)) { 228 /* require next major version */ 229 uc_fw->major_ver_wanted += 1; 230 uc_fw->minor_ver_wanted = 0; 231 uc_fw->user_overridden = user; 232 } else if (i915_inject_load_error(i915, e)) { 233 /* require next minor version */ 234 uc_fw->minor_ver_wanted += 1; 235 uc_fw->user_overridden = user; 236 } else if (uc_fw->major_ver_wanted && i915_inject_load_error(i915, e)) { 237 /* require prev major version */ 238 uc_fw->major_ver_wanted -= 1; 239 uc_fw->minor_ver_wanted = 0; 240 uc_fw->user_overridden = user; 241 } else if (uc_fw->minor_ver_wanted && i915_inject_load_error(i915, e)) { 242 /* require prev minor version - hey, this should work! */ 243 uc_fw->minor_ver_wanted -= 1; 244 uc_fw->user_overridden = user; 245 } else if (user && i915_inject_load_error(i915, e)) { 246 /* officially unsupported platform */ 247 uc_fw->major_ver_wanted = 0; 248 uc_fw->minor_ver_wanted = 0; 249 uc_fw->user_overridden = true; 250 } 251 } 252 253 /** 254 * intel_uc_fw_fetch - fetch uC firmware 255 * @uc_fw: uC firmware 256 * @i915: device private 257 * 258 * Fetch uC firmware into GEM obj. 259 * 260 * Return: 0 on success, a negative errno code on failure. 261 */ 262 int intel_uc_fw_fetch(struct intel_uc_fw *uc_fw, struct drm_i915_private *i915) 263 { 264 struct device *dev = i915->drm.dev; 265 struct drm_i915_gem_object *obj; 266 const struct firmware *fw = NULL; 267 struct uc_css_header *css; 268 size_t size; 269 int err; 270 271 GEM_BUG_ON(!i915->wopcm.size); 272 GEM_BUG_ON(!intel_uc_fw_is_enabled(uc_fw)); 273 274 err = i915_inject_load_error(i915, -ENXIO); 275 if (err) 276 return err; 277 278 __force_fw_fetch_failures(uc_fw, i915, -EINVAL); 279 __force_fw_fetch_failures(uc_fw, i915, -ESTALE); 280 281 err = request_firmware(&fw, uc_fw->path, dev); 282 if (err) 283 goto fail; 284 285 /* Check the size of the blob before examining buffer contents */ 286 if (unlikely(fw->size < sizeof(struct uc_css_header))) { 287 dev_warn(dev, "%s firmware %s: invalid size: %zu < %zu\n", 288 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 289 fw->size, sizeof(struct uc_css_header)); 290 err = -ENODATA; 291 goto fail; 292 } 293 294 css = (struct uc_css_header *)fw->data; 295 296 /* Check integrity of size values inside CSS header */ 297 size = (css->header_size_dw - css->key_size_dw - css->modulus_size_dw - 298 css->exponent_size_dw) * sizeof(u32); 299 if (unlikely(size != sizeof(struct uc_css_header))) { 300 dev_warn(dev, 301 "%s firmware %s: unexpected header size: %zu != %zu\n", 302 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 303 fw->size, sizeof(struct uc_css_header)); 304 err = -EPROTO; 305 goto fail; 306 } 307 308 /* uCode size must calculated from other sizes */ 309 uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32); 310 311 /* now RSA */ 312 if (unlikely(css->key_size_dw != UOS_RSA_SCRATCH_COUNT)) { 313 dev_warn(dev, "%s firmware %s: unexpected key size: %u != %u\n", 314 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 315 css->key_size_dw, UOS_RSA_SCRATCH_COUNT); 316 err = -EPROTO; 317 goto fail; 318 } 319 uc_fw->rsa_size = css->key_size_dw * sizeof(u32); 320 321 /* At least, it should have header, uCode and RSA. Size of all three. */ 322 size = sizeof(struct uc_css_header) + uc_fw->ucode_size + uc_fw->rsa_size; 323 if (unlikely(fw->size < size)) { 324 dev_warn(dev, "%s firmware %s: invalid size: %zu < %zu\n", 325 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 326 fw->size, size); 327 err = -ENOEXEC; 328 goto fail; 329 } 330 331 /* Sanity check whether this fw is not larger than whole WOPCM memory */ 332 size = __intel_uc_fw_get_upload_size(uc_fw); 333 if (unlikely(size >= i915->wopcm.size)) { 334 dev_warn(dev, "%s firmware %s: invalid size: %zu > %zu\n", 335 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 336 size, (size_t)i915->wopcm.size); 337 err = -E2BIG; 338 goto fail; 339 } 340 341 /* Get version numbers from the CSS header */ 342 uc_fw->major_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MAJOR, 343 css->sw_version); 344 uc_fw->minor_ver_found = FIELD_GET(CSS_SW_VERSION_UC_MINOR, 345 css->sw_version); 346 347 if (uc_fw->major_ver_found != uc_fw->major_ver_wanted || 348 uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) { 349 dev_notice(dev, "%s firmware %s: unexpected version: %u.%u != %u.%u\n", 350 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 351 uc_fw->major_ver_found, uc_fw->minor_ver_found, 352 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted); 353 if (!intel_uc_fw_is_overridden(uc_fw)) { 354 err = -ENOEXEC; 355 goto fail; 356 } 357 } 358 359 obj = i915_gem_object_create_shmem_from_data(i915, fw->data, fw->size); 360 if (IS_ERR(obj)) { 361 err = PTR_ERR(obj); 362 goto fail; 363 } 364 365 uc_fw->obj = obj; 366 uc_fw->size = fw->size; 367 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_AVAILABLE); 368 369 release_firmware(fw); 370 return 0; 371 372 fail: 373 intel_uc_fw_change_status(uc_fw, err == -ENOENT ? 374 INTEL_UC_FIRMWARE_MISSING : 375 INTEL_UC_FIRMWARE_ERROR); 376 377 dev_notice(dev, "%s firmware %s: fetch failed with error %d\n", 378 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, err); 379 dev_info(dev, "%s firmware(s) can be downloaded from %s\n", 380 intel_uc_fw_type_repr(uc_fw->type), INTEL_UC_FIRMWARE_URL); 381 382 release_firmware(fw); /* OK even if fw is NULL */ 383 return err; 384 } 385 386 static u32 uc_fw_ggtt_offset(struct intel_uc_fw *uc_fw, struct i915_ggtt *ggtt) 387 { 388 struct drm_mm_node *node = &ggtt->uc_fw; 389 390 GEM_BUG_ON(!drm_mm_node_allocated(node)); 391 GEM_BUG_ON(upper_32_bits(node->start)); 392 GEM_BUG_ON(upper_32_bits(node->start + node->size - 1)); 393 394 return lower_32_bits(node->start); 395 } 396 397 static void intel_uc_fw_ggtt_bind(struct intel_uc_fw *uc_fw, 398 struct intel_gt *gt) 399 { 400 struct drm_i915_gem_object *obj = uc_fw->obj; 401 struct i915_ggtt *ggtt = gt->ggtt; 402 struct i915_vma dummy = { 403 .node.start = uc_fw_ggtt_offset(uc_fw, ggtt), 404 .node.size = obj->base.size, 405 .pages = obj->mm.pages, 406 .vm = &ggtt->vm, 407 }; 408 409 GEM_BUG_ON(!i915_gem_object_has_pinned_pages(obj)); 410 GEM_BUG_ON(dummy.node.size > ggtt->uc_fw.size); 411 412 /* uc_fw->obj cache domains were not controlled across suspend */ 413 drm_clflush_sg(dummy.pages); 414 415 ggtt->vm.insert_entries(&ggtt->vm, &dummy, I915_CACHE_NONE, 0); 416 } 417 418 static void intel_uc_fw_ggtt_unbind(struct intel_uc_fw *uc_fw, 419 struct intel_gt *gt) 420 { 421 struct drm_i915_gem_object *obj = uc_fw->obj; 422 struct i915_ggtt *ggtt = gt->ggtt; 423 u64 start = uc_fw_ggtt_offset(uc_fw, ggtt); 424 425 ggtt->vm.clear_range(&ggtt->vm, start, obj->base.size); 426 } 427 428 static int uc_fw_xfer(struct intel_uc_fw *uc_fw, struct intel_gt *gt, 429 u32 wopcm_offset, u32 dma_flags) 430 { 431 struct intel_uncore *uncore = gt->uncore; 432 u64 offset; 433 int ret; 434 435 ret = i915_inject_load_error(gt->i915, -ETIMEDOUT); 436 if (ret) 437 return ret; 438 439 intel_uncore_forcewake_get(uncore, FORCEWAKE_ALL); 440 441 /* Set the source address for the uCode */ 442 offset = uc_fw_ggtt_offset(uc_fw, gt->ggtt); 443 GEM_BUG_ON(upper_32_bits(offset) & 0xFFFF0000); 444 intel_uncore_write_fw(uncore, DMA_ADDR_0_LOW, lower_32_bits(offset)); 445 intel_uncore_write_fw(uncore, DMA_ADDR_0_HIGH, upper_32_bits(offset)); 446 447 /* Set the DMA destination */ 448 intel_uncore_write_fw(uncore, DMA_ADDR_1_LOW, wopcm_offset); 449 intel_uncore_write_fw(uncore, DMA_ADDR_1_HIGH, DMA_ADDRESS_SPACE_WOPCM); 450 451 /* 452 * Set the transfer size. The header plus uCode will be copied to WOPCM 453 * via DMA, excluding any other components 454 */ 455 intel_uncore_write_fw(uncore, DMA_COPY_SIZE, 456 sizeof(struct uc_css_header) + uc_fw->ucode_size); 457 458 /* Start the DMA */ 459 intel_uncore_write_fw(uncore, DMA_CTRL, 460 _MASKED_BIT_ENABLE(dma_flags | START_DMA)); 461 462 /* Wait for DMA to finish */ 463 ret = intel_wait_for_register_fw(uncore, DMA_CTRL, START_DMA, 0, 100); 464 if (ret) 465 dev_err(gt->i915->drm.dev, "DMA for %s fw failed, DMA_CTRL=%u\n", 466 intel_uc_fw_type_repr(uc_fw->type), 467 intel_uncore_read_fw(uncore, DMA_CTRL)); 468 469 /* Disable the bits once DMA is over */ 470 intel_uncore_write_fw(uncore, DMA_CTRL, _MASKED_BIT_DISABLE(dma_flags)); 471 472 intel_uncore_forcewake_put(uncore, FORCEWAKE_ALL); 473 474 return ret; 475 } 476 477 /** 478 * intel_uc_fw_upload - load uC firmware using custom loader 479 * @uc_fw: uC firmware 480 * @gt: the intel_gt structure 481 * @wopcm_offset: destination offset in wopcm 482 * @dma_flags: flags for flags for dma ctrl 483 * 484 * Loads uC firmware and updates internal flags. 485 * 486 * Return: 0 on success, non-zero on failure. 487 */ 488 int intel_uc_fw_upload(struct intel_uc_fw *uc_fw, struct intel_gt *gt, 489 u32 wopcm_offset, u32 dma_flags) 490 { 491 int err; 492 493 /* make sure the status was cleared the last time we reset the uc */ 494 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 495 496 err = i915_inject_load_error(gt->i915, -ENOEXEC); 497 if (err) 498 return err; 499 500 if (!intel_uc_fw_is_available(uc_fw)) 501 return -ENOEXEC; 502 503 /* Call custom loader */ 504 intel_uc_fw_ggtt_bind(uc_fw, gt); 505 err = uc_fw_xfer(uc_fw, gt, wopcm_offset, dma_flags); 506 intel_uc_fw_ggtt_unbind(uc_fw, gt); 507 if (err) 508 goto fail; 509 510 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_TRANSFERRED); 511 return 0; 512 513 fail: 514 i915_probe_error(gt->i915, "Failed to load %s firmware %s (%d)\n", 515 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path, 516 err); 517 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 518 return err; 519 } 520 521 int intel_uc_fw_init(struct intel_uc_fw *uc_fw) 522 { 523 int err; 524 525 /* this should happen before the load! */ 526 GEM_BUG_ON(intel_uc_fw_is_loaded(uc_fw)); 527 528 if (!intel_uc_fw_is_available(uc_fw)) 529 return -ENOEXEC; 530 531 err = i915_gem_object_pin_pages(uc_fw->obj); 532 if (err) { 533 DRM_DEBUG_DRIVER("%s fw pin-pages err=%d\n", 534 intel_uc_fw_type_repr(uc_fw->type), err); 535 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_FAIL); 536 } 537 538 return err; 539 } 540 541 void intel_uc_fw_fini(struct intel_uc_fw *uc_fw) 542 { 543 if (!intel_uc_fw_is_available(uc_fw)) 544 return; 545 546 i915_gem_object_unpin_pages(uc_fw->obj); 547 } 548 549 /** 550 * intel_uc_fw_cleanup_fetch - cleanup uC firmware 551 * @uc_fw: uC firmware 552 * 553 * Cleans up uC firmware by releasing the firmware GEM obj. 554 */ 555 void intel_uc_fw_cleanup_fetch(struct intel_uc_fw *uc_fw) 556 { 557 if (!intel_uc_fw_is_available(uc_fw)) 558 return; 559 560 i915_gem_object_put(fetch_and_zero(&uc_fw->obj)); 561 562 intel_uc_fw_change_status(uc_fw, INTEL_UC_FIRMWARE_SELECTED); 563 } 564 565 /** 566 * intel_uc_fw_copy_rsa - copy fw RSA to buffer 567 * 568 * @uc_fw: uC firmware 569 * @dst: dst buffer 570 * @max_len: max number of bytes to copy 571 * 572 * Return: number of copied bytes. 573 */ 574 size_t intel_uc_fw_copy_rsa(struct intel_uc_fw *uc_fw, void *dst, u32 max_len) 575 { 576 struct sg_table *pages = uc_fw->obj->mm.pages; 577 u32 size = min_t(u32, uc_fw->rsa_size, max_len); 578 u32 offset = sizeof(struct uc_css_header) + uc_fw->ucode_size; 579 580 GEM_BUG_ON(!intel_uc_fw_is_available(uc_fw)); 581 582 return sg_pcopy_to_buffer(pages->sgl, pages->nents, dst, size, offset); 583 } 584 585 /** 586 * intel_uc_fw_dump - dump information about uC firmware 587 * @uc_fw: uC firmware 588 * @p: the &drm_printer 589 * 590 * Pretty printer for uC firmware. 591 */ 592 void intel_uc_fw_dump(const struct intel_uc_fw *uc_fw, struct drm_printer *p) 593 { 594 drm_printf(p, "%s firmware: %s\n", 595 intel_uc_fw_type_repr(uc_fw->type), uc_fw->path); 596 drm_printf(p, "\tstatus: %s\n", 597 intel_uc_fw_status_repr(uc_fw->status)); 598 drm_printf(p, "\tversion: wanted %u.%u, found %u.%u\n", 599 uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted, 600 uc_fw->major_ver_found, uc_fw->minor_ver_found); 601 drm_printf(p, "\tuCode: %u bytes\n", uc_fw->ucode_size); 602 drm_printf(p, "\tRSA: %u bytes\n", uc_fw->rsa_size); 603 } 604