xref: /linux/drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h (revision c532de5a67a70f8533d495f8f2aaa9a0491c3ad0)
1 /* SPDX-License-Identifier: MIT */
2 /*
3  * Copyright © 2021 Intel Corporation
4  */
5 
6 #ifndef _INTEL_GUC_SLPC_H_
7 #define _INTEL_GUC_SLPC_H_
8 
9 #include "intel_guc_submission.h"
10 #include "intel_guc_slpc_types.h"
11 
12 #define SLPC_MAX_FREQ_MHZ 4250
13 
14 struct intel_gt;
15 struct drm_printer;
16 
17 static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
18 {
19 	return guc->slpc.supported;
20 }
21 
22 static inline bool intel_guc_slpc_is_wanted(struct intel_guc *guc)
23 {
24 	return guc->slpc.selected;
25 }
26 
27 static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
28 {
29 	return intel_guc_submission_is_used(guc) && intel_guc_slpc_is_wanted(guc);
30 }
31 
32 void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
33 
34 int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
35 int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
36 void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
37 int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
38 int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
39 int intel_guc_slpc_set_boost_freq(struct intel_guc_slpc *slpc, u32 val);
40 int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
41 int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
42 int intel_guc_slpc_print_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
43 int intel_guc_slpc_set_media_ratio_mode(struct intel_guc_slpc *slpc, u32 val);
44 void intel_guc_pm_intrmsk_enable(struct intel_gt *gt);
45 void intel_guc_slpc_boost(struct intel_guc_slpc *slpc);
46 void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc);
47 int intel_guc_slpc_set_ignore_eff_freq(struct intel_guc_slpc *slpc, bool val);
48 int intel_guc_slpc_set_strategy(struct intel_guc_slpc *slpc, u32 val);
49 
50 #endif
51