xref: /linux/drivers/gpu/drm/i915/gt/uc/intel_guc_rc.c (revision a4eb44a6435d6d8f9e642407a4a06f65eb90ca04)
1 // SPDX-License-Identifier: MIT
2 /*
3  * Copyright © 2021 Intel Corporation
4  */
5 
6 #include "intel_guc_rc.h"
7 #include "gt/intel_gt.h"
8 #include "i915_drv.h"
9 
10 static bool __guc_rc_supported(struct intel_guc *guc)
11 {
12 	/* GuC RC is unavailable for pre-Gen12 */
13 	return guc->submission_supported &&
14 		GRAPHICS_VER(guc_to_gt(guc)->i915) >= 12;
15 }
16 
17 static bool __guc_rc_selected(struct intel_guc *guc)
18 {
19 	if (!intel_guc_rc_is_supported(guc))
20 		return false;
21 
22 	return guc->submission_selected;
23 }
24 
25 void intel_guc_rc_init_early(struct intel_guc *guc)
26 {
27 	guc->rc_supported = __guc_rc_supported(guc);
28 	guc->rc_selected = __guc_rc_selected(guc);
29 }
30 
31 static int guc_action_control_gucrc(struct intel_guc *guc, bool enable)
32 {
33 	u32 rc_mode = enable ? INTEL_GUCRC_FIRMWARE_CONTROL :
34 				INTEL_GUCRC_HOST_CONTROL;
35 	u32 action[] = {
36 		INTEL_GUC_ACTION_SETUP_PC_GUCRC,
37 		rc_mode
38 	};
39 	int ret;
40 
41 	ret = intel_guc_send(guc, action, ARRAY_SIZE(action));
42 	ret = ret > 0 ? -EPROTO : ret;
43 
44 	return ret;
45 }
46 
47 static int __guc_rc_control(struct intel_guc *guc, bool enable)
48 {
49 	struct intel_gt *gt = guc_to_gt(guc);
50 	struct drm_device *drm = &guc_to_gt(guc)->i915->drm;
51 	int ret;
52 
53 	if (!intel_uc_uses_guc_rc(&gt->uc))
54 		return -EOPNOTSUPP;
55 
56 	if (!intel_guc_is_ready(guc))
57 		return -EINVAL;
58 
59 	ret = guc_action_control_gucrc(guc, enable);
60 	if (ret) {
61 		drm_err(drm, "Failed to %s GuC RC (%pe)\n",
62 			enabledisable(enable), ERR_PTR(ret));
63 		return ret;
64 	}
65 
66 	drm_info(&gt->i915->drm, "GuC RC: %s\n",
67 		 enableddisabled(enable));
68 
69 	return 0;
70 }
71 
72 int intel_guc_rc_enable(struct intel_guc *guc)
73 {
74 	return __guc_rc_control(guc, true);
75 }
76 
77 int intel_guc_rc_disable(struct intel_guc *guc)
78 {
79 	return __guc_rc_control(guc, false);
80 }
81