1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #include "selftest_llc.h" 7 #include "intel_rps.h" 8 9 static int gen6_verify_ring_freq(struct intel_llc *llc) 10 { 11 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; 12 struct ia_constants consts; 13 intel_wakeref_t wakeref; 14 unsigned int gpu_freq; 15 int err = 0; 16 17 wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm); 18 19 if (!get_ia_constants(llc, &consts)) 20 goto out_rpm; 21 22 for (gpu_freq = consts.min_gpu_freq; 23 gpu_freq <= consts.max_gpu_freq; 24 gpu_freq++) { 25 struct intel_rps *rps = &llc_to_gt(llc)->rps; 26 27 unsigned int ia_freq, ring_freq, found; 28 u32 val; 29 30 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); 31 32 val = gpu_freq; 33 if (snb_pcode_read(llc_to_gt(llc)->uncore, GEN6_PCODE_READ_MIN_FREQ_TABLE, 34 &val, NULL)) { 35 pr_err("Failed to read freq table[%d], range [%d, %d]\n", 36 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); 37 err = -ENXIO; 38 break; 39 } 40 41 found = (val >> 0) & 0xff; 42 if (found != ia_freq) { 43 pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n", 44 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 45 intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 46 found, ia_freq); 47 err = -EINVAL; 48 break; 49 } 50 51 found = (val >> 8) & 0xff; 52 if (found != ring_freq) { 53 pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n", 54 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 55 intel_gpu_freq(rps, gpu_freq * (GRAPHICS_VER(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 56 found, ring_freq); 57 err = -EINVAL; 58 break; 59 } 60 } 61 62 out_rpm: 63 intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref); 64 return err; 65 } 66 67 int st_llc_verify(struct intel_llc *llc) 68 { 69 return gen6_verify_ring_freq(llc); 70 } 71