1 /* 2 * SPDX-License-Identifier: MIT 3 * 4 * Copyright © 2019 Intel Corporation 5 */ 6 7 #include "intel_pm.h" /* intel_gpu_freq() */ 8 #include "selftest_llc.h" 9 #include "intel_rps.h" 10 11 static int gen6_verify_ring_freq(struct intel_llc *llc) 12 { 13 struct drm_i915_private *i915 = llc_to_gt(llc)->i915; 14 struct ia_constants consts; 15 intel_wakeref_t wakeref; 16 unsigned int gpu_freq; 17 int err = 0; 18 19 wakeref = intel_runtime_pm_get(llc_to_gt(llc)->uncore->rpm); 20 21 if (!get_ia_constants(llc, &consts)) 22 goto out_rpm; 23 24 for (gpu_freq = consts.min_gpu_freq; 25 gpu_freq <= consts.max_gpu_freq; 26 gpu_freq++) { 27 struct intel_rps *rps = &llc_to_gt(llc)->rps; 28 29 unsigned int ia_freq, ring_freq, found; 30 u32 val; 31 32 calc_ia_freq(llc, gpu_freq, &consts, &ia_freq, &ring_freq); 33 34 val = gpu_freq; 35 if (sandybridge_pcode_read(i915, 36 GEN6_PCODE_READ_MIN_FREQ_TABLE, 37 &val, NULL)) { 38 pr_err("Failed to read freq table[%d], range [%d, %d]\n", 39 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq); 40 err = -ENXIO; 41 break; 42 } 43 44 found = (val >> 0) & 0xff; 45 if (found != ia_freq) { 46 pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected CPU freq, found %d, expected %d\n", 47 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 48 intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 49 found, ia_freq); 50 err = -EINVAL; 51 break; 52 } 53 54 found = (val >> 8) & 0xff; 55 if (found != ring_freq) { 56 pr_err("Min freq table(%d/[%d, %d]):%dMHz did not match expected ring freq, found %d, expected %d\n", 57 gpu_freq, consts.min_gpu_freq, consts.max_gpu_freq, 58 intel_gpu_freq(rps, gpu_freq * (INTEL_GEN(i915) >= 9 ? GEN9_FREQ_SCALER : 1)), 59 found, ring_freq); 60 err = -EINVAL; 61 break; 62 } 63 } 64 65 out_rpm: 66 intel_runtime_pm_put(llc_to_gt(llc)->uncore->rpm, wakeref); 67 return err; 68 } 69 70 int st_llc_verify(struct intel_llc *llc) 71 { 72 return gen6_verify_ring_freq(llc); 73 } 74