1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2019 Intel Corporation 4 */ 5 6 #ifndef __INTEL_GT__ 7 #define __INTEL_GT__ 8 9 #include "intel_engine_types.h" 10 #include "intel_gt_types.h" 11 #include "intel_reset.h" 12 13 struct drm_i915_private; 14 struct drm_printer; 15 16 #define GT_TRACE(gt, fmt, ...) do { \ 17 const struct intel_gt *gt__ __maybe_unused = (gt); \ 18 GEM_TRACE("%s " fmt, dev_name(gt__->i915->drm.dev), \ 19 ##__VA_ARGS__); \ 20 } while (0) 21 22 static inline bool gt_is_root(struct intel_gt *gt) 23 { 24 return !gt->info.id; 25 } 26 27 static inline struct intel_gt *uc_to_gt(struct intel_uc *uc) 28 { 29 return container_of(uc, struct intel_gt, uc); 30 } 31 32 static inline struct intel_gt *guc_to_gt(struct intel_guc *guc) 33 { 34 return container_of(guc, struct intel_gt, uc.guc); 35 } 36 37 static inline struct intel_gt *huc_to_gt(struct intel_huc *huc) 38 { 39 return container_of(huc, struct intel_gt, uc.huc); 40 } 41 42 static inline struct intel_gt *gsc_uc_to_gt(struct intel_gsc_uc *gsc_uc) 43 { 44 return container_of(gsc_uc, struct intel_gt, uc.gsc); 45 } 46 47 static inline struct intel_gt *gsc_to_gt(struct intel_gsc *gsc) 48 { 49 return container_of(gsc, struct intel_gt, gsc); 50 } 51 52 void intel_gt_common_init_early(struct intel_gt *gt); 53 int intel_root_gt_init_early(struct drm_i915_private *i915); 54 int intel_gt_assign_ggtt(struct intel_gt *gt); 55 int intel_gt_init_mmio(struct intel_gt *gt); 56 int __must_check intel_gt_init_hw(struct intel_gt *gt); 57 int intel_gt_init(struct intel_gt *gt); 58 void intel_gt_driver_register(struct intel_gt *gt); 59 60 void intel_gt_driver_unregister(struct intel_gt *gt); 61 void intel_gt_driver_remove(struct intel_gt *gt); 62 void intel_gt_driver_release(struct intel_gt *gt); 63 void intel_gt_driver_late_release_all(struct drm_i915_private *i915); 64 65 int intel_gt_wait_for_idle(struct intel_gt *gt, long timeout); 66 67 void intel_gt_check_and_clear_faults(struct intel_gt *gt); 68 i915_reg_t intel_gt_perf_limit_reasons_reg(struct intel_gt *gt); 69 void intel_gt_clear_error_registers(struct intel_gt *gt, 70 intel_engine_mask_t engine_mask); 71 72 void intel_gt_flush_ggtt_writes(struct intel_gt *gt); 73 void intel_gt_chipset_flush(struct intel_gt *gt); 74 75 static inline u32 intel_gt_scratch_offset(const struct intel_gt *gt, 76 enum intel_gt_scratch_field field) 77 { 78 return i915_ggtt_offset(gt->scratch) + field; 79 } 80 81 static inline bool intel_gt_has_unrecoverable_error(const struct intel_gt *gt) 82 { 83 return test_bit(I915_WEDGED_ON_INIT, >->reset.flags) || 84 test_bit(I915_WEDGED_ON_FINI, >->reset.flags); 85 } 86 87 static inline bool intel_gt_is_wedged(const struct intel_gt *gt) 88 { 89 GEM_BUG_ON(intel_gt_has_unrecoverable_error(gt) && 90 !test_bit(I915_WEDGED, >->reset.flags)); 91 92 return unlikely(test_bit(I915_WEDGED, >->reset.flags)); 93 } 94 95 int intel_gt_probe_all(struct drm_i915_private *i915); 96 int intel_gt_tiles_init(struct drm_i915_private *i915); 97 void intel_gt_release_all(struct drm_i915_private *i915); 98 99 #define for_each_gt(gt__, i915__, id__) \ 100 for ((id__) = 0; \ 101 (id__) < I915_MAX_GT; \ 102 (id__)++) \ 103 for_each_if(((gt__) = (i915__)->gt[(id__)])) 104 105 void intel_gt_info_print(const struct intel_gt_info *info, 106 struct drm_printer *p); 107 108 void intel_gt_watchdog_work(struct work_struct *work); 109 110 static inline u32 intel_gt_tlb_seqno(const struct intel_gt *gt) 111 { 112 return seqprop_sequence(>->tlb.seqno); 113 } 114 115 static inline u32 intel_gt_next_invalidate_tlb_full(const struct intel_gt *gt) 116 { 117 return intel_gt_tlb_seqno(gt) | 1; 118 } 119 120 void intel_gt_invalidate_tlb(struct intel_gt *gt, u32 seqno); 121 122 #endif /* __INTEL_GT_H__ */ 123