1 // SPDX-License-Identifier: MIT 2 /* 3 * Copyright © 2016 Intel Corporation 4 */ 5 6 #include <linux/dma-fence-array.h> 7 #include <linux/dma-fence-chain.h> 8 #include <linux/jiffies.h> 9 10 #include "gt/intel_engine.h" 11 #include "gt/intel_rps.h" 12 13 #include "i915_gem_ioctls.h" 14 #include "i915_gem_object.h" 15 16 static long 17 i915_gem_object_wait_fence(struct dma_fence *fence, 18 unsigned int flags, 19 long timeout) 20 { 21 BUILD_BUG_ON(I915_WAIT_INTERRUPTIBLE != 0x1); 22 23 if (test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->flags)) 24 return timeout; 25 26 if (dma_fence_is_i915(fence)) 27 return i915_request_wait_timeout(to_request(fence), flags, timeout); 28 29 return dma_fence_wait_timeout(fence, 30 flags & I915_WAIT_INTERRUPTIBLE, 31 timeout); 32 } 33 34 static void 35 i915_gem_object_boost(struct dma_resv *resv, unsigned int flags) 36 { 37 struct dma_resv_iter cursor; 38 struct dma_fence *fence; 39 40 /* 41 * Prescan all fences for potential boosting before we begin waiting. 42 * 43 * When we wait, we wait on outstanding fences serially. If the 44 * dma-resv contains a sequence such as 1:1, 1:2 instead of a reduced 45 * form 1:2, then as we look at each wait in turn we see that each 46 * request is currently executing and not worthy of boosting. But if 47 * we only happen to look at the final fence in the sequence (because 48 * of request coalescing or splitting between read/write arrays by 49 * the iterator), then we would boost. As such our decision to boost 50 * or not is delicately balanced on the order we wait on fences. 51 * 52 * So instead of looking for boosts sequentially, look for all boosts 53 * upfront and then wait on the outstanding fences. 54 */ 55 56 dma_resv_iter_begin(&cursor, resv, 57 dma_resv_usage_rw(flags & I915_WAIT_ALL)); 58 dma_resv_for_each_fence_unlocked(&cursor, fence) 59 if (dma_fence_is_i915(fence) && 60 !i915_request_started(to_request(fence))) 61 intel_rps_boost(to_request(fence)); 62 dma_resv_iter_end(&cursor); 63 } 64 65 static long 66 i915_gem_object_wait_reservation(struct dma_resv *resv, 67 unsigned int flags, 68 long timeout) 69 { 70 struct dma_resv_iter cursor; 71 struct dma_fence *fence; 72 long ret = timeout ?: 1; 73 74 i915_gem_object_boost(resv, flags); 75 76 dma_resv_iter_begin(&cursor, resv, 77 dma_resv_usage_rw(flags & I915_WAIT_ALL)); 78 dma_resv_for_each_fence_unlocked(&cursor, fence) { 79 ret = i915_gem_object_wait_fence(fence, flags, timeout); 80 if (ret <= 0) 81 break; 82 83 if (timeout) 84 timeout = ret; 85 } 86 dma_resv_iter_end(&cursor); 87 88 return ret; 89 } 90 91 static void fence_set_priority(struct dma_fence *fence, 92 const struct i915_sched_attr *attr) 93 { 94 struct i915_request *rq; 95 struct intel_engine_cs *engine; 96 97 if (dma_fence_is_signaled(fence) || !dma_fence_is_i915(fence)) 98 return; 99 100 rq = to_request(fence); 101 engine = rq->engine; 102 103 rcu_read_lock(); /* RCU serialisation for set-wedged protection */ 104 if (engine->sched_engine->schedule) 105 engine->sched_engine->schedule(rq, attr); 106 rcu_read_unlock(); 107 } 108 109 static inline bool __dma_fence_is_chain(const struct dma_fence *fence) 110 { 111 return fence->ops == &dma_fence_chain_ops; 112 } 113 114 void i915_gem_fence_wait_priority(struct dma_fence *fence, 115 const struct i915_sched_attr *attr) 116 { 117 if (dma_fence_is_signaled(fence)) 118 return; 119 120 local_bh_disable(); 121 122 /* Recurse once into a fence-array */ 123 if (dma_fence_is_array(fence)) { 124 struct dma_fence_array *array = to_dma_fence_array(fence); 125 int i; 126 127 for (i = 0; i < array->num_fences; i++) 128 fence_set_priority(array->fences[i], attr); 129 } else if (__dma_fence_is_chain(fence)) { 130 struct dma_fence *iter; 131 132 /* The chain is ordered; if we boost the last, we boost all */ 133 dma_fence_chain_for_each(iter, fence) { 134 fence_set_priority(to_dma_fence_chain(iter)->fence, 135 attr); 136 break; 137 } 138 dma_fence_put(iter); 139 } else { 140 fence_set_priority(fence, attr); 141 } 142 143 local_bh_enable(); /* kick the tasklets if queues were reprioritised */ 144 } 145 146 int 147 i915_gem_object_wait_priority(struct drm_i915_gem_object *obj, 148 unsigned int flags, 149 const struct i915_sched_attr *attr) 150 { 151 struct dma_resv_iter cursor; 152 struct dma_fence *fence; 153 154 dma_resv_iter_begin(&cursor, obj->base.resv, 155 dma_resv_usage_rw(flags & I915_WAIT_ALL)); 156 dma_resv_for_each_fence_unlocked(&cursor, fence) 157 i915_gem_fence_wait_priority(fence, attr); 158 dma_resv_iter_end(&cursor); 159 return 0; 160 } 161 162 /** 163 * i915_gem_object_wait - Waits for rendering to the object to be completed 164 * @obj: i915 gem object 165 * @flags: how to wait (under a lock, for all rendering or just for writes etc) 166 * @timeout: how long to wait 167 */ 168 int 169 i915_gem_object_wait(struct drm_i915_gem_object *obj, 170 unsigned int flags, 171 long timeout) 172 { 173 might_sleep(); 174 GEM_BUG_ON(timeout < 0); 175 176 timeout = i915_gem_object_wait_reservation(obj->base.resv, 177 flags, timeout); 178 179 if (timeout < 0) 180 return timeout; 181 182 return !timeout ? -ETIME : 0; 183 } 184 185 static inline unsigned long nsecs_to_jiffies_timeout(const u64 n) 186 { 187 /* nsecs_to_jiffies64() does not guard against overflow */ 188 if ((NSEC_PER_SEC % HZ) != 0 && 189 div_u64(n, NSEC_PER_SEC) >= MAX_JIFFY_OFFSET / HZ) 190 return MAX_JIFFY_OFFSET; 191 192 return min_t(u64, MAX_JIFFY_OFFSET, nsecs_to_jiffies64(n) + 1); 193 } 194 195 static unsigned long to_wait_timeout(s64 timeout_ns) 196 { 197 if (timeout_ns < 0) 198 return MAX_SCHEDULE_TIMEOUT; 199 200 if (timeout_ns == 0) 201 return 0; 202 203 return nsecs_to_jiffies_timeout(timeout_ns); 204 } 205 206 /** 207 * i915_gem_wait_ioctl - implements DRM_IOCTL_I915_GEM_WAIT 208 * @dev: drm device pointer 209 * @data: ioctl data blob 210 * @file: drm file pointer 211 * 212 * Returns 0 if successful, else an error is returned with the remaining time in 213 * the timeout parameter. 214 * -ETIME: object is still busy after timeout 215 * -ERESTARTSYS: signal interrupted the wait 216 * -ENONENT: object doesn't exist 217 * Also possible, but rare: 218 * -EAGAIN: incomplete, restart syscall 219 * -ENOMEM: damn 220 * -ENODEV: Internal IRQ fail 221 * -E?: The add request failed 222 * 223 * The wait ioctl with a timeout of 0 reimplements the busy ioctl. With any 224 * non-zero timeout parameter the wait ioctl will wait for the given number of 225 * nanoseconds on an object becoming unbusy. Since the wait itself does so 226 * without holding struct_mutex the object may become re-busied before this 227 * function completes. A similar but shorter * race condition exists in the busy 228 * ioctl 229 */ 230 int 231 i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file) 232 { 233 struct drm_i915_gem_wait *args = data; 234 struct drm_i915_gem_object *obj; 235 ktime_t start; 236 long ret; 237 238 if (args->flags != 0) 239 return -EINVAL; 240 241 obj = i915_gem_object_lookup(file, args->bo_handle); 242 if (!obj) 243 return -ENOENT; 244 245 start = ktime_get(); 246 247 ret = i915_gem_object_wait(obj, 248 I915_WAIT_INTERRUPTIBLE | 249 I915_WAIT_PRIORITY | 250 I915_WAIT_ALL, 251 to_wait_timeout(args->timeout_ns)); 252 253 if (args->timeout_ns > 0) { 254 args->timeout_ns -= ktime_to_ns(ktime_sub(ktime_get(), start)); 255 if (args->timeout_ns < 0) 256 args->timeout_ns = 0; 257 258 /* 259 * Apparently ktime isn't accurate enough and occasionally has a 260 * bit of mismatch in the jiffies<->nsecs<->ktime loop. So patch 261 * things up to make the test happy. We allow up to 1 jiffy. 262 * 263 * This is a regression from the timespec->ktime conversion. 264 */ 265 if (ret == -ETIME && !nsecs_to_jiffies(args->timeout_ns)) 266 args->timeout_ns = 0; 267 268 /* Asked to wait beyond the jiffy/scheduler precision? */ 269 if (ret == -ETIME && args->timeout_ns) 270 ret = -EAGAIN; 271 } 272 273 i915_gem_object_put(obj); 274 return ret; 275 } 276 277 /** 278 * i915_gem_object_wait_migration - Sync an accelerated migration operation 279 * @obj: The migrating object. 280 * @flags: waiting flags. Currently supports only I915_WAIT_INTERRUPTIBLE. 281 * 282 * Wait for any pending async migration operation on the object, 283 * whether it's explicitly (i915_gem_object_migrate()) or implicitly 284 * (swapin, initial clearing) initiated. 285 * 286 * Return: 0 if successful, -ERESTARTSYS if a signal was hit during waiting. 287 */ 288 int i915_gem_object_wait_migration(struct drm_i915_gem_object *obj, 289 unsigned int flags) 290 { 291 might_sleep(); 292 293 return i915_gem_object_wait_moving_fence(obj, !!(flags & I915_WAIT_INTERRUPTIBLE)); 294 } 295