xref: /linux/drivers/gpu/drm/i915/display/vlv_sideband.c (revision 8d2b0853add1d7534dc0794e3c8e0b9e8c4ec640)
18393253bSJani Nikula // SPDX-License-Identifier: MIT
28393253bSJani Nikula /* Copyright © 2025 Intel Corporation */
38393253bSJani Nikula 
4*bd4d1856SJani Nikula #include <drm/drm_print.h>
5*bd4d1856SJani Nikula 
6*bd4d1856SJani Nikula #include "intel_display_core.h"
7*bd4d1856SJani Nikula #include "intel_display_types.h"
88393253bSJani Nikula #include "intel_dpio_phy.h"
98393253bSJani Nikula #include "vlv_sideband.h"
108393253bSJani Nikula 
11*bd4d1856SJani Nikula static enum vlv_iosf_sb_unit vlv_dpio_phy_to_unit(struct intel_display *display,
128393253bSJani Nikula 						  enum dpio_phy phy)
138393253bSJani Nikula {
148393253bSJani Nikula 	/*
158393253bSJani Nikula 	 * IOSF_PORT_DPIO: VLV x2 PHY (DP/HDMI B and C), CHV x1 PHY (DP/HDMI D)
168393253bSJani Nikula 	 * IOSF_PORT_DPIO_2: CHV x2 PHY (DP/HDMI B and C)
178393253bSJani Nikula 	 */
18*bd4d1856SJani Nikula 	if (display->platform.cherryview)
198393253bSJani Nikula 		return phy == DPIO_PHY0 ? VLV_IOSF_SB_DPIO_2 : VLV_IOSF_SB_DPIO;
208393253bSJani Nikula 	else
218393253bSJani Nikula 		return VLV_IOSF_SB_DPIO;
228393253bSJani Nikula }
238393253bSJani Nikula 
24*bd4d1856SJani Nikula u32 vlv_dpio_read(struct drm_device *drm, enum dpio_phy phy, int reg)
258393253bSJani Nikula {
26*bd4d1856SJani Nikula 	struct intel_display *display = to_intel_display(drm);
27*bd4d1856SJani Nikula 	enum vlv_iosf_sb_unit unit = vlv_dpio_phy_to_unit(display, phy);
288393253bSJani Nikula 	u32 val;
298393253bSJani Nikula 
30*bd4d1856SJani Nikula 	val = vlv_iosf_sb_read(drm, unit, reg);
318393253bSJani Nikula 
328393253bSJani Nikula 	/*
338393253bSJani Nikula 	 * FIXME: There might be some registers where all 1's is a valid value,
348393253bSJani Nikula 	 * so ideally we should check the register offset instead...
358393253bSJani Nikula 	 */
36*bd4d1856SJani Nikula 	drm_WARN(display->drm, val == 0xffffffff,
378393253bSJani Nikula 		 "DPIO PHY%d read reg 0x%x == 0x%x\n",
388393253bSJani Nikula 		 phy, reg, val);
398393253bSJani Nikula 
408393253bSJani Nikula 	return val;
418393253bSJani Nikula }
428393253bSJani Nikula 
43*bd4d1856SJani Nikula void vlv_dpio_write(struct drm_device *drm,
448393253bSJani Nikula 		    enum dpio_phy phy, int reg, u32 val)
458393253bSJani Nikula {
46*bd4d1856SJani Nikula 	struct intel_display *display = to_intel_display(drm);
47*bd4d1856SJani Nikula 	enum vlv_iosf_sb_unit unit = vlv_dpio_phy_to_unit(display, phy);
488393253bSJani Nikula 
49*bd4d1856SJani Nikula 	vlv_iosf_sb_write(drm, unit, reg, val);
508393253bSJani Nikula }
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