xref: /linux/drivers/gpu/drm/i915/display/skl_prefill.h (revision 24f171c7e145f43b9f187578e89b0982ce87e54c)
1*ba470a99SVille Syrjälä /* SPDX-License-Identifier: MIT */
2*ba470a99SVille Syrjälä /*
3*ba470a99SVille Syrjälä  * Copyright © 2025 Intel Corporation
4*ba470a99SVille Syrjälä  */
5*ba470a99SVille Syrjälä 
6*ba470a99SVille Syrjälä #ifndef __SKL_PREFILL_H__
7*ba470a99SVille Syrjälä #define __SKL_PREFILL_H__
8*ba470a99SVille Syrjälä 
9*ba470a99SVille Syrjälä #include <linux/types.h>
10*ba470a99SVille Syrjälä 
11*ba470a99SVille Syrjälä struct intel_crtc_state;
12*ba470a99SVille Syrjälä 
13*ba470a99SVille Syrjälä struct skl_prefill_ctx {
14*ba470a99SVille Syrjälä 	/* .16 scanlines */
15*ba470a99SVille Syrjälä 	struct {
16*ba470a99SVille Syrjälä 		unsigned int fixed;
17*ba470a99SVille Syrjälä 		unsigned int wm0;
18*ba470a99SVille Syrjälä 		unsigned int scaler_1st;
19*ba470a99SVille Syrjälä 		unsigned int scaler_2nd;
20*ba470a99SVille Syrjälä 		unsigned int dsc;
21*ba470a99SVille Syrjälä 		unsigned int full;
22*ba470a99SVille Syrjälä 	} prefill;
23*ba470a99SVille Syrjälä 
24*ba470a99SVille Syrjälä 	/* .16 adjustment factors */
25*ba470a99SVille Syrjälä 	struct {
26*ba470a99SVille Syrjälä 		unsigned int cdclk;
27*ba470a99SVille Syrjälä 		unsigned int scaler_1st;
28*ba470a99SVille Syrjälä 		unsigned int scaler_2nd;
29*ba470a99SVille Syrjälä 	} adj;
30*ba470a99SVille Syrjälä };
31*ba470a99SVille Syrjälä 
32*ba470a99SVille Syrjälä void skl_prefill_init_worst(struct skl_prefill_ctx *ctx,
33*ba470a99SVille Syrjälä 			    const struct intel_crtc_state *crtc_state);
34*ba470a99SVille Syrjälä void skl_prefill_init(struct skl_prefill_ctx *ctx,
35*ba470a99SVille Syrjälä 		      const struct intel_crtc_state *crtc_state);
36*ba470a99SVille Syrjälä 
37*ba470a99SVille Syrjälä bool skl_prefill_vblank_too_short(const struct skl_prefill_ctx *ctx,
38*ba470a99SVille Syrjälä 				  const struct intel_crtc_state *crtc_state,
39*ba470a99SVille Syrjälä 				  unsigned int latency_us);
40*ba470a99SVille Syrjälä int skl_prefill_min_guardband(const struct skl_prefill_ctx *ctx,
41*ba470a99SVille Syrjälä 			      const struct intel_crtc_state *crtc_state,
42*ba470a99SVille Syrjälä 			      unsigned int latency_us);
43*ba470a99SVille Syrjälä int skl_prefill_min_cdclk(const struct skl_prefill_ctx *ctx,
44*ba470a99SVille Syrjälä 			  const struct intel_crtc_state *crtc_state);
45*ba470a99SVille Syrjälä 
46*ba470a99SVille Syrjälä #endif /* __SKL_PREFILL_H__ */
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