16ca37b86SRodrigo Vivi /* SPDX-License-Identifier: MIT */ 26ca37b86SRodrigo Vivi /* 36ca37b86SRodrigo Vivi * Copyright 2025 Intel Corporation. 46ca37b86SRodrigo Vivi */ 56ca37b86SRodrigo Vivi 66ca37b86SRodrigo Vivi #ifndef __INTEL_PCH__ 76ca37b86SRodrigo Vivi #define __INTEL_PCH__ 86ca37b86SRodrigo Vivi 9ad283764SRodrigo Vivi #include "intel_display_conversion.h" 10ad283764SRodrigo Vivi 11ad283764SRodrigo Vivi struct intel_display; 126ca37b86SRodrigo Vivi 136ca37b86SRodrigo Vivi /* 146ca37b86SRodrigo Vivi * Sorted by south display engine compatibility. 156ca37b86SRodrigo Vivi * If the new PCH comes with a south display engine that is not 166ca37b86SRodrigo Vivi * inherited from the latest item, please do not add it to the 176ca37b86SRodrigo Vivi * end. Instead, add it right after its "parent" PCH. 186ca37b86SRodrigo Vivi */ 196ca37b86SRodrigo Vivi enum intel_pch { 206ca37b86SRodrigo Vivi PCH_NOP = -1, /* PCH without south display */ 216ca37b86SRodrigo Vivi PCH_NONE = 0, /* No PCH present */ 226ca37b86SRodrigo Vivi PCH_IBX, /* Ibexpeak PCH */ 236ca37b86SRodrigo Vivi PCH_CPT, /* Cougarpoint/Pantherpoint PCH */ 246ca37b86SRodrigo Vivi PCH_LPT_H, /* Lynxpoint/Wildcatpoint H PCH */ 256ca37b86SRodrigo Vivi PCH_LPT_LP, /* Lynxpoint/Wildcatpoint LP PCH */ 266ca37b86SRodrigo Vivi PCH_SPT, /* Sunrisepoint/Kaby Lake PCH */ 276ca37b86SRodrigo Vivi PCH_CNP, /* Cannon/Comet Lake PCH */ 286ca37b86SRodrigo Vivi PCH_ICP, /* Ice Lake/Jasper Lake PCH */ 296ca37b86SRodrigo Vivi PCH_TGP, /* Tiger Lake/Mule Creek Canyon PCH */ 306ca37b86SRodrigo Vivi PCH_ADP, /* Alder Lake PCH */ 316ca37b86SRodrigo Vivi 326ca37b86SRodrigo Vivi /* Fake PCHs, functionality handled on the same PCI dev */ 336ca37b86SRodrigo Vivi PCH_DG1 = 1024, 346ca37b86SRodrigo Vivi PCH_DG2, 356ca37b86SRodrigo Vivi PCH_MTL, 366ca37b86SRodrigo Vivi PCH_LNL, 376ca37b86SRodrigo Vivi }; 386ca37b86SRodrigo Vivi 39ad283764SRodrigo Vivi #define INTEL_PCH_TYPE(_display) (__to_intel_display(_display)->pch_type) 40ad283764SRodrigo Vivi #define HAS_PCH_DG2(display) (INTEL_PCH_TYPE(display) == PCH_DG2) 41ad283764SRodrigo Vivi #define HAS_PCH_ADP(display) (INTEL_PCH_TYPE(display) == PCH_ADP) 42ad283764SRodrigo Vivi #define HAS_PCH_DG1(display) (INTEL_PCH_TYPE(display) == PCH_DG1) 43ad283764SRodrigo Vivi #define HAS_PCH_TGP(display) (INTEL_PCH_TYPE(display) == PCH_TGP) 44ad283764SRodrigo Vivi #define HAS_PCH_ICP(display) (INTEL_PCH_TYPE(display) == PCH_ICP) 45ad283764SRodrigo Vivi #define HAS_PCH_CNP(display) (INTEL_PCH_TYPE(display) == PCH_CNP) 46ad283764SRodrigo Vivi #define HAS_PCH_SPT(display) (INTEL_PCH_TYPE(display) == PCH_SPT) 47ad283764SRodrigo Vivi #define HAS_PCH_LPT_H(display) (INTEL_PCH_TYPE(display) == PCH_LPT_H) 48ad283764SRodrigo Vivi #define HAS_PCH_LPT_LP(display) (INTEL_PCH_TYPE(display) == PCH_LPT_LP) 49ad283764SRodrigo Vivi #define HAS_PCH_LPT(display) (INTEL_PCH_TYPE(display) == PCH_LPT_H || \ 50ad283764SRodrigo Vivi INTEL_PCH_TYPE(display) == PCH_LPT_LP) 51ad283764SRodrigo Vivi #define HAS_PCH_CPT(display) (INTEL_PCH_TYPE(display) == PCH_CPT) 52ad283764SRodrigo Vivi #define HAS_PCH_IBX(display) (INTEL_PCH_TYPE(display) == PCH_IBX) 53ad283764SRodrigo Vivi #define HAS_PCH_NOP(display) (INTEL_PCH_TYPE(display) == PCH_NOP) 54ad283764SRodrigo Vivi #define HAS_PCH_SPLIT(display) (INTEL_PCH_TYPE(display) != PCH_NONE) 556ca37b86SRodrigo Vivi 56*3090ea03SJani Nikula void intel_pch_detect(struct intel_display *display); 576ca37b86SRodrigo Vivi 586ca37b86SRodrigo Vivi #endif /* __INTEL_PCH__ */ 59